lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4230b792-71e9-842d-ebdf-ad8bac8e11ef@infradead.org>
Date:   Tue, 19 Jan 2021 19:12:24 -0800
From:   Randy Dunlap <rdunlap@...radead.org>
To:     Xu Yilun <yilun.xu@...el.com>, mdf@...nel.org,
        linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     gregkh@...uxfoundation.org, trix@...hat.com, lgoncalv@...hat.com,
        hao.wu@...el.com
Subject: Re: [PATCH v7 2/2] Documentation: fpga: dfl: Add description for DFL
 UIO support

Doc suggestions:

On 1/19/21 6:43 PM, Xu Yilun wrote:
> This patch adds description for UIO support for dfl devices on DFL
> bus.
> 
> Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> ---
> v2: no doc in v1, add it for v2.
> v3: some documentation fixes.
> v4: documentation change since the driver matching is changed.
> v5: no change.
> v6: improve the title of the userspace driver support section.
>     some word improvement.
> v7: rebased to next-20210119
> ---
>  Documentation/fpga/dfl.rst | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index c41ac76..f96a6fb 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -7,6 +7,7 @@ Authors:
>  - Enno Luebbers <enno.luebbers@...el.com>
>  - Xiao Guangrong <guangrong.xiao@...ux.intel.com>
>  - Wu Hao <hao.wu@...el.com>
> +- Xu Yilun <yilun.xu@...el.com>
>  
>  The Device Feature List (DFL) FPGA framework (and drivers according to
>  this framework) hides the very details of low layer hardwares and provides
> @@ -530,6 +531,30 @@ Being able to specify more than one DFL per BAR has been considered, but it
>  was determined the use case did not provide value.  Specifying a single DFL
>  per BAR simplifies the implementation and allows for extra error checking.
>  
> +
> +Userspace driver support for DFL devices
> +========================================
> +The purpose of an FPGA is to be reprogrammed with newly developed hardware
> +components. New hardware can instantiate a new private feature in the DFL, and
> +then get a DFL device in their system. In some cases users may need a userspace

   then present a DFL device in the system.

> +driver for the DFL device:
> +
> +* Users may need to run some diagnostic test for their hardwares.

                                                          hardware.

> +* Users may prototype the kernel driver in user space.
> +* Some hardware is designed for specific purposes and does not fit into one of
> +  the standard kernel subsystems.
> +
> +This requires direct access to MMIO space and interrupt handling from
> +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this
> +purpose. It adds the uio_pdrv_genirq platform device with the resources of
> +the DFL feature, and lets the generic UIO platform device driver provide UIO
> +support to userspace.
> +
> +FPGA_DFL_UIO_PDEV should be selected to enable the dfl-uio-pdev module driver.
> +To support a new DFL feature been directly accessed via UIO, its feature id

   To support a new DFL feature via UIO direct access, its feature id

> +should be added to the driver's id_table.
> +
> +
>  Open discussion
>  ===============
>  FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
> 

HTH.
-- 
~Randy
"He closes his eyes and drops the goggles.  You can't get hurt
by looking at a bitmap.  Or can you?"
(Neal Stephenson: Snow Crash)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ