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Message-ID: <202101211731.n9wurHki-lkp@intel.com>
Date: Thu, 21 Jan 2021 17:20:43 +0800
From: kernel test robot <lkp@...el.com>
To: Sia Jee Heng <jee.heng.sia@...el.com>, vkoul@...nel.org,
Eugeniy.Paltsev@...opsys.com, robh+dt@...nel.org
Cc: kbuild-all@...ts.01.org, clang-built-linux@...glegroups.com,
andriy.shevchenko@...ux.intel.com, jee.heng.sia@...el.com,
dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v10 14/16] dmaengine: dw-axi-dmac: Add Intel KeemBay
AxiDMA BYTE and HALFWORD registers
Hi Sia,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on 9791581c049c10929e97098374dd1716a81fefcc]
url: https://github.com/0day-ci/linux/commits/Sia-Jee-Heng/dmaengine-dw-axi-dmac-support-Intel-KeemBay-AxiDMA/20210121-143156
base: 9791581c049c10929e97098374dd1716a81fefcc
config: x86_64-randconfig-r014-20210121 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 22b68440e1647e16b5ee24b924986207173c02d1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/3e1070bb4257f637414242a7116ec9bd50d07b5f
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sia-Jee-Heng/dmaengine-dw-axi-dmac-support-Intel-KeemBay-AxiDMA/20210121-143156
git checkout 3e1070bb4257f637414242a7116ec9bd50d07b5f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
>> drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:322:11: warning: variable 'offset' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
else if (reg_width == DWAXIDMAC_TRANS_WIDTH_16)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:325:40: note: uninitialized use occurs here
val = ioread32(chan->chip->apb_regs + offset);
^~~~~~
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:322:7: note: remove the 'if' if its condition is always true
else if (reg_width == DWAXIDMAC_TRANS_WIDTH_16)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:312:23: note: initialize the variable 'offset' to silence this warning
u32 reg_width, offset, val;
^
= 0
1 warning generated.
vim +322 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
309
310 static void dw_axi_dma_set_byte_halfword(struct axi_dma_chan *chan, bool set)
311 {
312 u32 reg_width, offset, val;
313
314 if (!chan->chip->apb_regs) {
315 dev_dbg(chan->chip->dev, "apb_regs not initialized\n");
316 return;
317 }
318
319 reg_width = __ffs(chan->config.dst_addr_width);
320 if (reg_width == DWAXIDMAC_TRANS_WIDTH_8)
321 offset = DMAC_APB_BYTE_WR_CH_EN;
> 322 else if (reg_width == DWAXIDMAC_TRANS_WIDTH_16)
323 offset = DMAC_APB_HALFWORD_WR_CH_EN;
324
325 val = ioread32(chan->chip->apb_regs + offset);
326
327 if (set)
328 val |= BIT(chan->id);
329 else
330 val &= ~BIT(chan->id);
331
332 iowrite32(val, chan->chip->apb_regs + offset);
333 }
334 /* Called in chan locked context */
335 static void axi_chan_block_xfer_start(struct axi_dma_chan *chan,
336 struct axi_dma_desc *first)
337 {
338 u32 priority = chan->chip->dw->hdata->priority[chan->id];
339 u32 reg, irq_mask;
340 u8 lms = 0; /* Select AXI0 master for LLI fetching */
341
342 if (unlikely(axi_chan_is_hw_enable(chan))) {
343 dev_err(chan2dev(chan), "%s is non-idle!\n",
344 axi_chan_name(chan));
345
346 return;
347 }
348
349 axi_dma_enable(chan->chip);
350
351 reg = (DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_DST_MULTBLK_TYPE_POS |
352 DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_SRC_MULTBLK_TYPE_POS);
353 axi_chan_iowrite32(chan, CH_CFG_L, reg);
354
355 reg = (DWAXIDMAC_TT_FC_MEM_TO_MEM_DMAC << CH_CFG_H_TT_FC_POS |
356 priority << CH_CFG_H_PRIORITY_POS |
357 DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_DST_POS |
358 DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS);
359 switch (chan->direction) {
360 case DMA_MEM_TO_DEV:
361 dw_axi_dma_set_byte_halfword(chan, true);
362 reg |= (chan->config.device_fc ?
363 DWAXIDMAC_TT_FC_MEM_TO_PER_DST :
364 DWAXIDMAC_TT_FC_MEM_TO_PER_DMAC)
365 << CH_CFG_H_TT_FC_POS;
366 break;
367 case DMA_DEV_TO_MEM:
368 reg |= (chan->config.device_fc ?
369 DWAXIDMAC_TT_FC_PER_TO_MEM_SRC :
370 DWAXIDMAC_TT_FC_PER_TO_MEM_DMAC)
371 << CH_CFG_H_TT_FC_POS;
372 break;
373 default:
374 break;
375 }
376 axi_chan_iowrite32(chan, CH_CFG_H, reg);
377
378 write_chan_llp(chan, first->hw_desc[0].llp | lms);
379
380 irq_mask = DWAXIDMAC_IRQ_DMA_TRF | DWAXIDMAC_IRQ_ALL_ERR;
381 axi_chan_irq_sig_set(chan, irq_mask);
382
383 /* Generate 'suspend' status but don't generate interrupt */
384 irq_mask |= DWAXIDMAC_IRQ_SUSPENDED;
385 axi_chan_irq_set(chan, irq_mask);
386
387 axi_chan_enable(chan);
388 }
389
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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