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Message-ID: <CAK8P3a3OjQC_tJ77u+N2UU28N6sgpTmN9cpuB0nX22PFJUx-BQ@mail.gmail.com>
Date: Thu, 21 Jan 2021 12:14:24 +0100
From: Arnd Bergmann <arnd@...nel.org>
To: Mohamed Mediouni <mohamed.mediouni@...amail.com>
Cc: Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Hector Martin <marcan@...can.st>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Marc Zyngier <maz@...nel.org>, Will Deacon <will@...nel.org>,
Stan Skowronek <stan@...ellium.com>
Subject: Re: [RFC PATCH 6/7] arm64: kernel: Apple CPU start driver
On Wed, Jan 20, 2021 at 2:27 PM Mohamed Mediouni
<mohamed.mediouni@...amail.com> wrote:
> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
> index 14cd727d3c4b..a6ff8cb3db1e 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.yaml
> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
> @@ -176,6 +176,7 @@ properties:
> oneOf:
> # On ARM v8 64-bit this property is required
> - enum:
> + - apple
> - psci
> - spin-table
> # On ARM 32-bit systems this property is optional
This uses a very generic identifier for doing something that may
be very specific to a particular SoC generation. It's going to be hard
to decide what the right abstraction will be for long-term maintenance,
so I'd recommend starting with a boot loader that implements
spin-table for secondary startup, and getting back to this after more
of the basic stuff works.
> +static int cpu_apple_start_prepare(unsigned int cpu)
> +{
> + struct device_node *node;
> + struct cpu_apple_start_info *info;
> +
> + info = per_cpu_ptr(&cpu_apple_start_info, cpu);
> +
> + if (info->pmgr_start && info->cputrc_rvbar && info->dbg_unlock)
> + return 0;
> +
> + node = of_find_compatible_node(NULL, NULL, "apple,startcpu");
> + if (!node) {
> + pr_err("%s: missing startcpu node in device tree.\n", __func__);
> + return -EINVAL;
> + }
Where is the binding documentation for this? The way you do a separate
of_iomap() for each CPU suggests that this is not a great binding to
start with. Are these perhaps just individual registers within a larger IP
block in the end?
Arnd
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