[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210122105101.27374-12-gabriel.fernandez@foss.st.com>
Date: Fri, 22 Jan 2021 11:50:58 +0100
From: <gabriel.fernandez@...s.st.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Etienne Carriere <etienne.carriere@...com>,
Gabriel Fernandez <gabriel.fernandez@...s.st.com>
CC: <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH 11/14] ARM: dts: stm32: define SCMI resources on stm32mp15
From: Gabriel Fernandez <gabriel.fernandez@...s.st.com>
Platform stm32mp15 relies on SCMI resources (clocks and reset domains).
This change adds SCMI resources description in the platform device
tree. SCMI resources uses a mailbox based on some shared memory and
a SMC mailbox notification.
SCMI0 exposes clocks and reset controllers for resources under RCC[TZEN]
configuration control. It is default enabled as SoC default
configuration is RCC[TZEN]=1.
SCMI1 exposes clocks for resources under RCC[MCKPROT] control. The node
is disabled by default as default configuration is RCC[MCKPROT]=0.
Signed-off-by: Etienne Carriere <etienne.carriere@...com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...s.st.com>
---
arch/arm/boot/dts/stm32mp151.dtsi | 50 +++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 3c75abacb374..da3647373365 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -30,6 +30,56 @@
interrupt-parent = <&intc>;
};
+ scmi_sram: sram@...ff000 {
+ compatible = "mmio-sram";
+ reg = <0x2ffff000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x2ffff000 0x1000>;
+
+ scmi0_shm: scmi_shm@0 {
+ reg = <0 0x80>;
+ };
+
+ scmi1_shm: scmi_shm@200 {
+ reg = <0x200 0x80>;
+ };
+ };
+
+ firmware {
+ scmi0: scmi0 {
+ compatible = "arm,scmi-smc";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ arm,smc-id = <0x82002000>;
+ shmem = <&scmi0_shm>;
+
+ scmi0_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+
+ scmi0_reset: protocol@16 {
+ reg = <0x16>;
+ #reset-cells = <1>;
+ };
+ };
+
+ scmi1: scmi1 {
+ compatible = "arm,scmi-smc";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ arm,smc-id = <0x82002001>;
+ shmem = <&scmi1_shm>;
+ status = "disabled";
+
+ scmi1_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.17.1
Powered by blists - more mailing lists