lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sun, 24 Jan 2021 12:56:34 +0100
From:   Greg KH <gregkh@...uxfoundation.org>
To:     "Thokala, Srikanth" <srikanth.thokala@...el.com>
Cc:     "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "markgross@...nel.org" <markgross@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>, "bp@...e.de" <bp@...e.de>,
        "damien.lemoal@....com" <damien.lemoal@....com>,
        "dragan.cvetic@...inx.com" <dragan.cvetic@...inx.com>,
        "corbet@....net" <corbet@....net>,
        "leonard.crestez@....com" <leonard.crestez@....com>,
        "palmerdabbelt@...gle.com" <palmerdabbelt@...gle.com>,
        "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
        "peng.fan@....com" <peng.fan@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Derek Kiernan <derek.kiernan@...inx.com>
Subject: Re: [PATCH v2 09/34] misc: xlink-pcie: lh: Add PCIe EPF driver for
 Local Host

On Sun, Jan 24, 2021 at 11:48:29AM +0000, Thokala, Srikanth wrote:
> > > +{
> > > +	struct pci_epf_bar *epf_bar;
> > > +	bool bar_fixed_64bit;
> > > +	int ret, i;
> > > +
> > > +	for (i = BAR_0; i <= BAR_5; i++) {
> > > +		epf_bar = &epf->bar[i];
> > > +		bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 <<
> > i));
> > > +		if (bar_fixed_64bit)
> > > +			epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
> > > +		if (epc_features->bar_fixed_size[i])
> > > +			epf_bar->size = epc_features->bar_fixed_size[i];
> > > +
> > > +		if (i == BAR_2) {
> > > +			ret = intel_xpcie_check_bar(epf, epf_bar, BAR_2,
> > > +						    BAR2_MIN_SIZE,
> > > +						    epc_features->reserved_bar);
> > > +			if (ret)
> > > +				return ret;
> > > +		}
> > > +
> > > +		if (i == BAR_4) {
> > > +			ret = intel_xpcie_check_bar(epf, epf_bar, BAR_4,
> > > +						    BAR4_MIN_SIZE,
> > > +						    epc_features->reserved_bar);
> > > +			if (ret)
> > > +				return ret;
> > > +		}
> > 
> > Why do you need to check all of this?  Where is the data coming from
> > that could be incorrect?
> 
> PCI BAR attributes, as inputs, are coming from the PCIe controller driver
> through PCIe End Point Framework.  These checks are required to compare the 
> configuration this driver is expecting to the configuration coming from
> the PCIe controller driver.

So why do you not trust that information coming from the caller?
Shouldn't it always be correct as it already is validated by that
in-kernel caller?  Don't check for things you don't have to check for
because you control the code that calls this stuff.

thanks,

greg k-h

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ