linux-kernel - Re: [PATCH 1/4] ARM: dts: qcom: msm8974: add gpu support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20210125000916.GA22513@onstation.org>
Date:   Sun, 24 Jan 2021 19:09:16 -0500
From:   Brian Masney <masneyb@...tation.org>
To:     Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Iskren Chernev <iskren.chernev@...il.com>
Cc:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht,
        Samuel Pascua <pascua.samuel.14@...il.com>,
        Alexey Minnekhanov <alexeymin@...tmarketos.org>
Subject: Re: [PATCH 1/4] ARM: dts: qcom: msm8974: add gpu support

On Sun, Jan 24, 2021 at 03:56:06PM +0100, Konrad Dybcio wrote:
> Hi,
> 
> 
> > +		gpu_opp_table: opp_table {
> > +			status = "disabled";
> 
> 
> Is there a good reason to disable this?
> 
> 
> > +			opp-800000000 {
> > +				opp-hz = /bits/ 64 <800000000>;
> > +			};
> 
> No. A330 can't go lightspeed (unless there's some secret ultra-binned msm8974pro-v4-ad-5g). [1]

Hi Iskren,

I believe that the Nexus 5 GPU frequencies are documented in the
downstream kernel at:
https://github.com/AICP/kernel_lge_hammerhead/blob/n7.1/arch/arm/boot/dts/msm8974-gpu.dtsi#L67

I am fairly certain that the qcom,bus-freq property is an index into the
qcom,msm-bus,vectors-KBps property above. This will map to the
interconnect and operating points in the upstream kernel.

Note that the actual implementation in a3xx_gpu.c and a4xx_gpu.c
currently has this snippet to set the bus speed:

    /*
     * Set the ICC path to maximum speed for now by multiplying the fastest
     * frequency by the bus width (8). We'll want to scale this later on to
     * improve battery life.
     */
    icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
    icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);

This should be fine for the time being. You'll want to document it
correctly in device tree though.

If the v2 changes too much, then feel free to drop my name from the
patch. I thought that I had made these changes already but apparently
not. :/

Brian