Message-Id: <57a20436-5d12-4f7c-b413-0cd1908acf02@www.fastmail.com>
Date:   Mon, 25 Jan 2021 11:17:24 +1030
From:   "Andrew Jeffery" <andrew@...id.au>
To:     "Ryan Chen" <ryan_chen@...eedtech.com>,
        "Samuel Holland" <samuel@...lland.org>,
        "Stephen Boyd" <sboyd@...nel.org>, "Joel Stanley" <joel@....id.au>
Cc:     BMC-SW <BMC-SW@...eedtech.com>,
        linux-aspeed <linux-aspeed@...ts.ozlabs.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        "Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "Linux ARM" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/1] clk: aspeed: modify some default clks are critical



On Fri, 22 Jan 2021, at 18:45, Ryan Chen wrote:
> Hello,
> 	How about this patch progress?
> 	It does impact a lot of machine that when BMC boot at u-boot. 
> 	SUART is work for Host. But after boot into kernel, due to the clk disabled. 
> 	The SUART is not work for Host anymore. 

Maybe it's worth taking Ryan's patch for now, and when the protected-clocks 
binding gets merged we can rip out the CLK_IS_CRITICAL flags and convert the 
Aspeed devicetrees to use protected-clocks instead?

The only issue I see with that plan is it becomes ambiguous as to which clock 
each platform considers crititical/in-need-of-protection.

Andrew

> 
> Regards,
> Ryan
> > -----Original Message-----
> > From: Samuel Holland <samuel@...lland.org>
> > Sent: Thursday, October 29, 2020 10:25 AM
> > To: Stephen Boyd <sboyd@...nel.org>; Joel Stanley <joel@....id.au>
> > Cc: Andrew Jeffery <andrew@...id.au>; Michael Turquette
> > <mturquette@...libre.com>; Ryan Chen <ryan_chen@...eedtech.com>;
> > BMC-SW <BMC-SW@...eedtech.com>; Linux ARM
> > <linux-arm-kernel@...ts.infradead.org>; linux-aspeed
> > <linux-aspeed@...ts.ozlabs.org>; linux-clk@...r.kernel.org; Linux Kernel
> > Mailing List <linux-kernel@...r.kernel.org>
> > Subject: Re: Re: [PATCH 1/1] clk: aspeed: modify some default clks are critical
> > 
> > Stephen,
> > 
> > On 10/14/20 12:16 PM, Stephen Boyd wrote:
> > > Quoting Joel Stanley (2020-10-13 22:28:00)
> > >> On Wed, 14 Oct 2020 at 02:50, Stephen Boyd <sboyd@...nel.org> wrote:
> > >>>
> > >>> Quoting Ryan Chen (2020-09-28 00:01:08)
> > >>>> In ASPEED SoC LCLK is LPC clock for all SuperIO device, UART1/UART2
> > >>>> are default for Host SuperIO UART device, eSPI clk for Host eSPI
> > >>>> bus access eSPI slave channel, those clks can't be disable should
> > >>>> keep default, otherwise will affect Host side access SuperIO and SPI slave
> > device.
> > >>>>
> > >>>> Signed-off-by: Ryan Chen <ryan_chen@...eedtech.com>
> > >>>> ---
> > >>>
> > >>> Is there resolution on this thread?
> > >>
> > >> Not yet.
> > >>
> > >> We have a system where the BMC (management controller) controls some
> > >> clocks, but the peripherals that it's clocking are outside the BMC's
> > >> control. In this case, the host processor us using some UARTs and
> > >> what not independent of any code running on the BMC.
> > >>
> > >> Ryan wants to have them marked as critical so the BMC never powers them
> > down.
> > >>
> > >> However, there are systems that don't use this part of the soc, so
> > >> for those implementations they are not critical and Linux on the BMC
> > >> can turn them off.
> > >>
> > >> Do you have any thoughts? Has anyone solved a similar problem already?
> > >>
> > >
> > > Is this critical clocks in DT? Where we want to have different DT for
> > > different device configurations to indicate that some clks should be
> > > marked critical so they're never turned off and other times they
> > > aren't so they're turned off?
> > >
> > > It also sounds sort of like the protected-clocks binding. Where you
> > > don't want to touch certain clks depending on the usage configuration
> > > of the SoC. There is a patch to make that generic that I haven't
> > > applied because it looks wrong at first glance[1]. Maybe not
> > > registering those clks to the framework on the configuration that Ryan has is
> > good enough?
> > 
> > Could you please be more specific than the patch "looks wrong"? I'm more
> > than happy to update the patch to address your concerns, but I cannot do that
> > unless I know what your concerns are.
> > 
> > Regards,
> > Samuel
> > 
> > > [1]
> > > https://lore.kernel.org/r/20200903040015.5627-2-samuel@sholland.org
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

Powered by blists - more mailing lists