linux-kernel - Re: [PATCH v17 11/26] x86/mm: Update ptep_set_wrprotect() and pmdp_set_wrprotect() for transition from _PAGE_DIRTY to _PAGE

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Message-ID: <8084836b-4990-90e8-5c9a-97a920f0239e@intel.com>
Date:   Mon, 25 Jan 2021 13:27:51 -0800
From:   "Yu, Yu-cheng" <yu-cheng.yu@...el.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
        linux-doc@...r.kernel.org, linux-mm@...ck.org,
        linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
        Arnd Bergmann <arnd@...db.de>,
        Andy Lutomirski <luto@...nel.org>,
        Balbir Singh <bsingharora@...il.com>,
        Cyrill Gorcunov <gorcunov@...il.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Eugene Syromiatnikov <esyr@...hat.com>,
        Florian Weimer <fweimer@...hat.com>,
        "H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
        Jonathan Corbet <corbet@....net>,
        Kees Cook <keescook@...omium.org>,
        Mike Kravetz <mike.kravetz@...cle.com>,
        Nadav Amit <nadav.amit@...il.com>,
        Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
        Peter Zijlstra <peterz@...radead.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
        Dave Martin <Dave.Martin@....com>,
        Weijiang Yang <weijiang.yang@...el.com>,
        Pengfei Xu <pengfei.xu@...el.com>
Subject: Re: [PATCH v17 11/26] x86/mm: Update ptep_set_wrprotect() and
 pmdp_set_wrprotect() for transition from _PAGE_DIRTY to _PAGE_COW

On 1/25/2021 10:27 AM, Borislav Petkov wrote:
> On Tue, Dec 29, 2020 at 01:30:38PM -0800, Yu-cheng Yu wrote:

[...]

>> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
>> index 666c25ab9564..1c84f1ba32b9 100644
>> --- a/arch/x86/include/asm/pgtable.h
>> +++ b/arch/x86/include/asm/pgtable.h
>> @@ -1226,6 +1226,32 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
>>   static inline void ptep_set_wrprotect(struct mm_struct *mm,
>>   				      unsigned long addr, pte_t *ptep)
>>   {
>> +	/*
>> +	 * Some processors can start a write, but end up seeing a read-only
>> +	 * PTE by the time they get to the Dirty bit.  In this case, they
>> +	 * will set the Dirty bit, leaving a read-only, Dirty PTE which
>> +	 * looks like a shadow stack PTE.
>> +	 *
>> +	 * However, this behavior has been improved
> 
> Improved how?

Processors supporting Shadow Stack will not set a read-only PTE's dirty 
bit.  I will revise the comments.

>> and will not occur on
>> +	 * processors supporting Shadow Stack.  Without this guarantee, a
> 
> Which guarantee? That it won't happen on CPUs which support SHSTK?
> 

Yes.

>> +	 * transition to a non-present PTE and flush the TLB would be
> 
> s/flush the TLB/TLB flush/
> 
>> +	 * needed.
>> +	 *
>> +	 * When changing a writable PTE to read-only and if the PTE has
>> +	 * _PAGE_DIRTY set, move that bit to _PAGE_COW so that the PTE is
>> +	 * not a shadow stack PTE.
>> +	 */
> 
> This sentence doesn't belong here as it refers to what pte_wrprotect()
> does. You could expand the comment in pte_wrprotect() with this here as
> it is better.

I will move this paragraph to pte_wrprotect().

> 
>> +	if (cpu_feature_enabled(X86_FEATURE_SHSTK)) {
>> +		pte_t old_pte, new_pte;
>> +
>> +		do {
>> +			old_pte = READ_ONCE(*ptep);
>> +			new_pte = pte_wrprotect(old_pte);
> 
> Maybe I'm missing something but those two can happen outside of the
> loop, no? Or is *ptep somehow changing concurrently while the loop is
> doing the CMPXCHG and you need to recreate it each time?
> 
> IOW, you can generate upfront and do the empty loop...

*ptep can change concurrently.

> 
>> +
>> +		} while (!try_cmpxchg(&ptep->pte, &old_pte.pte, new_pte.pte));
>> +
>> +		return;
>> +	}
>>   	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
>>   }
>>   

[...]