[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YA/o/stKkt7I0tg1@ulmo>
Date: Tue, 26 Jan 2021 11:03:42 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Mark Brown <broonie@...nel.org>
Cc: Sowjanya Komatineni <skomatineni@...dia.com>, jonathanh@...dia.com,
robh+dt@...nel.org, lukas@...ner.de, bbrezillon@...nel.org,
p.yadav@...com, tudor.ambarus@...rochip.com,
linux-spi@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID
TEGRA210_CLK_QSPI_PM
On Mon, Dec 21, 2020 at 01:17:31PM -0800, Sowjanya Komatineni wrote:
> Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
> when using DDR interface mode.
>
> This patch adds clock ID for this to dt-binding.
>
> Acked-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
> ---
> include/dt-bindings/clock/tegra210-car.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Hi Mark,
It looks like you applied this patch along with the driver patches.
Unfortunately, if I apply the DT updates without this patch, the DT
files will fail to build because this symbol is missing.
Since the TEGRA210_CLK_QSPI_PM symbol isn't used by the driver patches
directly, would you mind dropping this so that I can pick it up into the
Tegra tree along with the DT updates?
I realize this is completely unobvious, so sorry for not noticing and
bringing this up earlier.
Thanks,
Thierry
Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)
Powered by blists - more mailing lists