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Message-Id: <20210126131239.8335-3-o.rempel@pengutronix.de>
Date: Tue, 26 Jan 2021 14:12:39 +0100
From: Oleksij Rempel <o.rempel@...gutronix.de>
To: Rob Herring <robh+dt@...nel.org>,
William Breathitt Gray <vilhelm.gray@...il.com>
Cc: Oleksij Rempel <o.rempel@...gutronix.de>,
Ahmad Fatoum <a.fatoum@...gutronix.de>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Pengutronix Kernel Team <kernel@...gutronix.de>,
David Jander <david@...tonic.nl>,
Robin van der Gracht <robin@...tonic.nl>,
linux-iio@...r.kernel.org
Subject: [PATCH v4 2/2] counter: add IRQ or GPIO based pulse counter
Add simple IRQ or GPIO base pulse counter. This device is used to measure
rotation speed of some agricultural devices, so no high frequency on the
counter pin is expected.
The maximal measurement frequency depends on the CPU and system load. On
the idle iMX6S I was able to measure up to 20kHz without count drops.
Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@...gutronix.de>
---
drivers/counter/Kconfig | 10 ++
drivers/counter/Makefile | 1 +
drivers/counter/pulse-cnt.c | 235 ++++++++++++++++++++++++++++++++++++
3 files changed, 246 insertions(+)
create mode 100644 drivers/counter/pulse-cnt.c
diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
index 2de53ab0dd25..73107a861648 100644
--- a/drivers/counter/Kconfig
+++ b/drivers/counter/Kconfig
@@ -29,6 +29,16 @@ config 104_QUAD_8
The base port addresses for the devices may be configured via the base
array module parameter.
+config PULSE_CNT
+ tristate "Pulse counter driver"
+ depends on GPIOLIB
+ help
+ Select this option to enable pulse counter driver. Any interrupt source
+ can be used by this driver as the pulse source.
+
+ To compile this driver as a module, choose M here: the
+ module will be called gpio-pulse-cnt.
+
config STM32_TIMER_CNT
tristate "STM32 Timer encoder counter driver"
depends on MFD_STM32_TIMERS || COMPILE_TEST
diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile
index 0a393f71e481..73999e39e984 100644
--- a/drivers/counter/Makefile
+++ b/drivers/counter/Makefile
@@ -6,6 +6,7 @@
obj-$(CONFIG_COUNTER) += counter.o
obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
+obj-$(CONFIG_PULSE_CNT) += pulse-cnt.o
obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
obj-$(CONFIG_TI_EQEP) += ti-eqep.o
diff --git a/drivers/counter/pulse-cnt.c b/drivers/counter/pulse-cnt.c
new file mode 100644
index 000000000000..4128b4b3661e
--- /dev/null
+++ b/drivers/counter/pulse-cnt.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Pengutronix, Oleksij Rempel <kernel@...gutronix.de>
+ */
+
+#include <linux/counter.h>
+#include <linux/gpio/consumer.h>
+#include <linux/interrupt.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#define PULSE_CNT_NAME "pulse-cnt"
+
+struct pulse_cnt_priv {
+ struct counter_device counter;
+ struct counter_ops ops;
+ struct gpio_desc *gpio;
+ int irq;
+ bool enabled;
+ atomic_t count;
+};
+
+static irqreturn_t pulse_cnt_isr(int irq, void *dev_id)
+{
+ struct pulse_cnt_priv *priv = dev_id;
+
+ atomic_inc(&priv->count);
+
+ return IRQ_HANDLED;
+}
+
+static ssize_t pulse_cnt_enable_read(struct counter_device *counter,
+ struct counter_count *count, void *private,
+ char *buf)
+{
+ struct pulse_cnt_priv *priv = counter->priv;
+
+ return sysfs_emit(buf, "%d\n", priv->enabled);
+}
+
+static ssize_t pulse_cnt_enable_write(struct counter_device *counter,
+ struct counter_count *count,
+ void *private, const char *buf,
+ size_t len)
+{
+ struct pulse_cnt_priv *priv = counter->priv;
+ bool enable;
+ ssize_t ret;
+
+ ret = kstrtobool(buf, &enable);
+ if (ret)
+ return ret;
+
+ if (priv->enabled == enable)
+ return len;
+
+ if (enable) {
+ priv->enabled = enable;
+ enable_irq(priv->irq);
+ } else {
+ disable_irq(priv->irq);
+ priv->enabled = enable;
+ }
+
+ return len;
+}
+
+static const struct counter_count_ext pulse_cnt_ext[] = {
+ {
+ .name = "enable",
+ .read = pulse_cnt_enable_read,
+ .write = pulse_cnt_enable_write,
+ },
+};
+
+static enum counter_synapse_action pulse_cnt_synapse_actionss[] = {
+ COUNTER_SYNAPSE_ACTION_RISING_EDGE,
+};
+
+static int pulse_cnt_action_get(struct counter_device *counter,
+ struct counter_count *count,
+ struct counter_synapse *synapse,
+ size_t *action)
+{
+ *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
+
+ return 0;
+}
+
+static int pulse_cnt_read(struct counter_device *counter,
+ struct counter_count *count,
+ unsigned long *val)
+{
+ struct pulse_cnt_priv *priv = counter->priv;
+
+ *val = atomic_read(&priv->count);
+
+ return 0;
+}
+
+static int pulse_cnt_write(struct counter_device *counter,
+ struct counter_count *count,
+ const unsigned long val)
+{
+ struct pulse_cnt_priv *priv = counter->priv;
+
+ atomic_set(&priv->count, val);
+
+ return 0;
+}
+
+static int pulse_cnt_function_get(struct counter_device *counter,
+ struct counter_count *count, size_t *function)
+{
+ *function = COUNTER_COUNT_FUNCTION_INCREASE;
+
+ return 0;
+}
+
+static int pulse_cnt_signal_read(struct counter_device *counter,
+ struct counter_signal *signal,
+ enum counter_signal_value *val)
+{
+ struct pulse_cnt_priv *priv = counter->priv;
+ int ret;
+
+ ret = gpiod_get_value(priv->gpio);
+ if (ret < 0)
+ return ret;
+
+ *val = ret ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW;
+
+ return 0;
+}
+
+static struct counter_signal pulse_cnt_signals[] = {
+ {
+ .id = 0,
+ .name = "Channel 0 signal",
+ },
+};
+
+static struct counter_synapse pulse_cnt_synapses[] = {
+ {
+ .actions_list = pulse_cnt_synapse_actionss,
+ .num_actions = ARRAY_SIZE(pulse_cnt_synapse_actionss),
+ .signal = &pulse_cnt_signals[0]
+ },
+};
+
+static enum counter_count_function pulse_cnt_functions[] = {
+ COUNTER_COUNT_FUNCTION_INCREASE,
+};
+
+static struct counter_count pulse_cnts[] = {
+ {
+ .id = 0,
+ .name = "Channel 1 Count",
+ .functions_list = pulse_cnt_functions,
+ .num_functions = ARRAY_SIZE(pulse_cnt_functions),
+ .synapses = pulse_cnt_synapses,
+ .num_synapses = ARRAY_SIZE(pulse_cnt_synapses),
+ .ext = pulse_cnt_ext,
+ .num_ext = ARRAY_SIZE(pulse_cnt_ext),
+ },
+};
+
+static int pulse_cnt_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct pulse_cnt_priv *priv;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->irq = platform_get_irq(pdev, 0);
+ if (priv->irq < 0) {
+ dev_err(dev, "failed to map GPIO to IRQ: %d\n", priv->irq);
+ return priv->irq;
+ }
+
+ priv->gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_IN);
+ if (IS_ERR(priv->gpio))
+ return dev_err_probe(dev, PTR_ERR(priv->gpio), "failed to get gpio\n");
+
+ priv->ops.action_get = pulse_cnt_action_get;
+ priv->ops.count_read = pulse_cnt_read;
+ priv->ops.count_write = pulse_cnt_write;
+ priv->ops.function_get = pulse_cnt_function_get;
+ if (priv->gpio)
+ priv->ops.signal_read = pulse_cnt_signal_read;
+
+ priv->counter.name = dev_name(dev);
+ priv->counter.parent = dev;
+ priv->counter.ops = &priv->ops;
+ priv->counter.counts = pulse_cnts;
+ priv->counter.num_counts = ARRAY_SIZE(pulse_cnts);
+ priv->counter.signals = pulse_cnt_signals;
+ priv->counter.num_signals = ARRAY_SIZE(pulse_cnt_signals);
+ priv->counter.priv = priv;
+
+ irq_set_status_flags(priv->irq, IRQ_NOAUTOEN);
+ ret = devm_request_irq(dev, priv->irq, pulse_cnt_isr,
+ IRQF_TRIGGER_RISING | IRQF_NO_THREAD,
+ PULSE_CNT_NAME, priv);
+ if (ret)
+ return ret;
+
+ platform_set_drvdata(pdev, priv);
+
+ return devm_counter_register(dev, &priv->counter);
+}
+
+static const struct of_device_id pulse_cnt_of_match[] = {
+ { .compatible = "virtual,pulse-counter", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, pulse_cnt_of_match);
+
+static struct platform_driver pulse_cnt_driver = {
+ .probe = pulse_cnt_probe,
+ .driver = {
+ .name = PULSE_CNT_NAME,
+ .of_match_table = pulse_cnt_of_match,
+ },
+};
+module_platform_driver(pulse_cnt_driver);
+
+MODULE_ALIAS("platform:pulse-counter");
+MODULE_AUTHOR("Oleksij Rempel <o.rempel@...gutronix.de>");
+MODULE_DESCRIPTION("Pulse counter driver");
+MODULE_LICENSE("GPL v2");
--
2.30.0
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