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Message-ID: <724cb274-36ce-fb48-a156-4eaf9e686fdf@codeaurora.org>
Date: Mon, 25 Jan 2021 17:14:35 -0800
From: Wesley Cheng <wcheng@...eaurora.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: balbi@...nel.org, gregkh@...uxfoundation.org, robh+dt@...nel.org,
agross@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org, peter.chen@....com,
jackp@...eaurora.org
Subject: Re: [PATCH v6 3/4] usb: dwc3: Resize TX FIFOs to meet EP bursting
requirements
On 1/22/2021 9:12 AM, Bjorn Andersson wrote:
> On Thu 21 Jan 22:01 CST 2021, Wesley Cheng wrote:
>
Hi Bjorn,
>
> Under what circumstances should we specify this? And in particular are
> there scenarios (in the Qualcomm platforms) where this must not be set?
>The TXFIFO dynamic allocation is actually a feature within the DWC3
controller, and isn't specifically for QCOM based platforms. It won't
do any harm functionally if this flag is not set, as this is meant for
enhancing performance/bandwidth.
> In particular, the composition can be changed in runtime, so should we
> set this for all Qualcomm platforms?
>
Ideally yes, if we want to increase bandwith for situations where SS
endpoint bursting is set to a higher value.
> And if that's the case, can we not just set it from the qcom driver?
>
Since this is a common DWC3 core feature, I think it would make more
sense to have it in DWC3 core instead of a vendor's DWC3 glue driver.
Thanks
Wesley Cheng
> Regards,
> Bjorn
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