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Message-ID: <9308ad5d-48bd-ebd2-2ea3-9775b8c11163@ti.com>
Date:   Wed, 27 Jan 2021 20:56:32 +0530
From:   Aswath Govindraju <a-govindraju@...com>
To:     Nishanth Menon <nm@...com>
CC:     Vignesh Raghavendra <vigneshr@...com>,
        Lokesh Vutla <lokeshvutla@...com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Faiz Abbas <faiz_abbas@...com>,
        Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 1/2] dts: ti: k3-j7200-main: Add support for zeroth
 instance of GPIO subsystem

Hi Nishanth,

On 27/01/21 8:42 pm, Nishanth Menon wrote:
> On 20:38-20210127, Aswath Govindraju wrote:
>> Add support for the zeroth instance of GPIO subsystem in the main domain.
>>
>> Signed-off-by: Aswath Govindraju <a-govindraju@...com>
> 
> 
> I really dont want to pick up one patch per node instance. It is hard
> to scale and just creates a lot of noise.
> 

As the main goal of the patch series was to add support for higher speed
modes in MMC, I added only the required ones. If required I will send a
follow up patch to add the remaining GPIO nodes.

Thanks,
Aswath

>> ---
>>  arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> index 4cc2e9094d0e..75dffbb26d52 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> @@ -294,6 +294,23 @@
>>  		pinctrl-single,function-mask = <0xffffffff>;
>>  	};
>>  
>> +	main_gpio0: gpio@...000 {
>> +		compatible = "ti,j721e-gpio", "ti,keystone-gpio";
>> +		reg = <0x0 0x00600000 0x0 0x100>;
>> +		gpio-controller;
>> +		#gpio-cells = <2>;
>> +		interrupt-parent = <&main_gpio_intr>;
>> +		interrupts = <145>, <146>, <147>, <148>,
>> +			     <149>;
>> +		interrupt-controller;
>> +		#interrupt-cells = <2>;
>> +		ti,ngpio = <69>;
>> +		ti,davinci-gpio-unbanked = <0>;
>> +		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
>> +		clocks = <&k3_clks 105 0>;
>> +		clock-names = "gpio";
>> +	};
>> +
>>  	main_uart0: serial@...0000 {
>>  		compatible = "ti,j721e-uart", "ti,am654-uart";
>>  		reg = <0x00 0x02800000 0x00 0x100>;
>> -- 
>> 2.17.1
>>
> 

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