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Message-ID: <CAF=yD-LJ9O2Vsqj2+wPu3Hnf2wRwPDUX=ty=sX49=nD1iF2Nhw@mail.gmail.com>
Date: Wed, 27 Jan 2021 15:15:26 -0500
From: Willem de Bruijn <willemdebruijn.kernel@...il.com>
To: Hariprasad Kelam <hkelam@...vell.com>
Cc: Network Development <netdev@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
David Miller <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Sunil Kovvuri Goutham <sgoutham@...vell.com>,
Linu Cherian <lcherian@...vell.com>,
Geethasowjanya Akula <gakula@...vell.com>,
Jerin Jacob <jerinj@...vell.com>, sbhatta@...vell.com,
Christina Jacob <cjacob@...vell.com>
Subject: Re: [Patch v2 net-next 1/7] octeontx2-af: forward error correction configuration
On Wed, Jan 27, 2021 at 4:05 AM Hariprasad Kelam <hkelam@...vell.com> wrote:
>
> From: Christina Jacob <cjacob@...vell.com>
>
> CGX block supports forward error correction modes baseR
> and RS. This patch adds support to set encoding mode
> and to read corrected/uncorrected block counters
>
> Adds new mailbox handlers set_fec to configure encoding modes
> and fec_stats to read counters and also increase mbox timeout
> to accomdate firmware command response timeout.
>
> Along with new CGX_CMD_SET_FEC command add other commands to
> sync with kernel enum list with firmware.
>
> Signed-off-by: Christina Jacob <cjacob@...vell.com>
> Signed-off-by: Sunil Goutham <sgoutham@...vell.com>
> Signed-off-by: Hariprasad Kelam <hkelam@...vell.com>
> ---
> drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 74 ++++++++++++++++++++++
> drivers/net/ethernet/marvell/octeontx2/af/cgx.h | 7 ++
> .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 ++++-
> drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++++++-
> .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c | 33 ++++++++++
> 5 files changed, 151 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> index 84a9123..5489dab 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> @@ -340,6 +340,58 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64 *tx_stat)
> return 0;
> }
>
> +static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
> +{
> + if (linfo->fec) {
> + switch (linfo->lmac_type_id) {
> + case LMAC_MODE_SGMII:
> + case LMAC_MODE_XAUI:
> + case LMAC_MODE_RXAUI:
> + case LMAC_MODE_QSGMII:
> + return 0;
> + case LMAC_MODE_10G_R:
> + case LMAC_MODE_25G_R:
> + case LMAC_MODE_100G_R:
> + case LMAC_MODE_USXGMII:
> + return 1;
> + case LMAC_MODE_40G_R:
> + return 4;
> + case LMAC_MODE_50G_R:
> + if (linfo->fec == OTX2_FEC_BASER)
> + return 2;
> + else
> + return 1;
> + }
> + }
> + return 0;
may consider inverting the condition, to remove one level of indentation.
> +int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
> +{
> + u64 req = 0, resp;
> + struct cgx *cgx;
> + int err = 0;
> +
> + cgx = cgx_get_pdata(cgx_id);
> + if (!cgx)
> + return -ENXIO;
> +
> + req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
> + req = FIELD_SET(CMDSETFEC, fec, req);
> + err = cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id);
> + if (!err) {
> + cgx->lmac_idmap[lmac_id]->link_info.fec =
> + FIELD_GET(RESP_LINKSTAT_FEC, resp);
> + return cgx->lmac_idmap[lmac_id]->link_info.fec;
> + }
> + return err;
Prefer keeping the success path linear and return early if (err) in
explicit branch. This also aids branch prediction.
> +int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,
> + struct msg_req *req,
> + struct cgx_fec_stats_rsp *rsp)
> +{
> + int pf = rvu_get_pf(req->hdr.pcifunc);
> + u8 cgx_idx, lmac;
> + int err = 0;
> + void *cgxd;
> +
> + if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
> + return -EPERM;
> + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
> +
> + cgxd = rvu_cgx_pdata(cgx_idx, rvu);
> + err = cgx_get_fec_stats(cgxd, lmac, rsp);
> + return err;
no need for variable err
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