Date:   Wed, 27 Jan 2021 22:19:39 +0000
From:   Will Deacon <will@...nel.org>
To:     Andrey Konovalov <andreyknvl@...gle.com>
Cc:     Vincenzo Frascino <vincenzo.frascino@....com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        kasan-dev <kasan-dev@...glegroups.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Dmitry Vyukov <dvyukov@...gle.com>,
        Andrey Ryabinin <aryabinin@...tuozzo.com>,
        Alexander Potapenko <glider@...gle.com>,
        Marco Elver <elver@...gle.com>,
        Evgenii Stepanov <eugenis@...gle.com>,
        Branislav Rankov <Branislav.Rankov@....com>
Subject: Re: [PATCH v9 0/4] arm64: ARMv8.5-A: MTE: Add async mode support

On Wed, Jan 27, 2021 at 09:00:17PM +0100, Andrey Konovalov wrote:
> On Tue, Jan 26, 2021 at 2:46 PM Vincenzo Frascino
> <vincenzo.frascino@....com> wrote:
> >
> > This patchset implements the asynchronous mode support for ARMv8.5-A
> > Memory Tagging Extension (MTE), which is a debugging feature that allows
> > to detect with the help of the architecture the C and C++ programmatic
> > memory errors like buffer overflow, use-after-free, use-after-return, etc.
> >
> > MTE is built on top of the AArch64 v8.0 virtual address tagging TBI
> > (Top Byte Ignore) feature and allows a task to set a 4 bit tag on any
> > subset of its address space that is multiple of a 16 bytes granule. MTE
> > is based on a lock-key mechanism where the lock is the tag associated to
> > the physical memory and the key is the tag associated to the virtual
> > address.
> > When MTE is enabled and tags are set for ranges of address space of a task,
> > the PE will compare the tag related to the physical memory with the tag
> > related to the virtual address (tag check operation). Access to the memory
> > is granted only if the two tags match. In case of mismatch the PE will raise
> > an exception.
> >
> > The exception can be handled synchronously or asynchronously. When the
> > asynchronous mode is enabled:
> >   - Upon fault the PE updates the TFSR_EL1 register.
> >   - The kernel detects the change during one of the following:
> >     - Context switching
> >     - Return to user/EL0
> >     - Kernel entry from EL1
> >     - Kernel exit to EL1
> >   - If the register has been updated by the PE the kernel clears it and
> >     reports the error.
> >
> > The series is based on linux-next/akpm.
> >
> > To simplify the testing a tree with the new patches on top has been made
> > available at [1].
> >
> > [1] https://git.gitlab.arm.com/linux-arm/linux-vf.git mte/v10.async.akpm
> >
> > Cc: Andrew Morton <akpm@...ux-foundation.org>
> > Cc: Catalin Marinas <catalin.marinas@....com>
> > Cc: Will Deacon <will@...nel.org>
> > Cc: Dmitry Vyukov <dvyukov@...gle.com>
> > Cc: Andrey Ryabinin <aryabinin@...tuozzo.com>
> > Cc: Alexander Potapenko <glider@...gle.com>
> > Cc: Marco Elver <elver@...gle.com>
> > Cc: Evgenii Stepanov <eugenis@...gle.com>
> > Cc: Branislav Rankov <Branislav.Rankov@....com>
> > Cc: Andrey Konovalov <andreyknvl@...gle.com>
> > Signed-off-by: Vincenzo Frascino <vincenzo.frascino@....com>
> 
> Tested-by: Andrey Konovalov <andreyknvl@...gle.com>
> 
> > Vincenzo Frascino (4):
> >   arm64: mte: Add asynchronous mode support
> >   kasan: Add KASAN mode kernel parameter
> >   kasan: Add report for async mode
> >   arm64: mte: Enable async tag check fault
> 
> Andrew, could you pick this up into mm? The whole series will need to
> go through mm due to dependencies on the patches that are already
> there.

Please can you check that it doesn't conflict with the arm64 for-next/core
branch first?

Will

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