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Message-Id: <7d7a0990-c9ca-4113-aa41-415b5cb54cf5@www.fastmail.com>
Date:   Thu, 28 Jan 2021 09:46:25 +1030
From:   "Andrew Jeffery" <andrew@...id.au>
To:     "Konstantin Aladyshev" <aladyshev22@...il.com>
Cc:     devicetree@...r.kernel.org, linux-aspeed@...ts.ozlabs.org,
        linux-kernel@...r.kernel.org, "Rob Herring" <robh+dt@...nel.org>,
        "Joel Stanley" <joel@....id.au>, supreeth.venkatesh@....com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address



On Thu, 28 Jan 2021, at 04:53, Konstantin Aladyshev wrote:
> AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
> Currently ASPEED controller snoops only 0x80 port and therefore captures
> only the lower byte of each POST code.
> Enable secondary LPC snooping address to capture the higher byte of POST
> codes.
> 
> Signed-off-by: Konstantin Aladyshev <aladyshev22@...il.com>

Reviewed-by: Andrew Jeffery <andrew@...id.au>

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