linux-kernel - [PATCH net-next 4/8] net: dsa: microchip: add support for phylink management

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Date:   Thu, 28 Jan 2021 12:11:08 +0530
From:   Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
To:     <andrew@...n.ch>, <olteanv@...il.com>, <netdev@...r.kernel.org>,
        <robh+dt@...nel.org>
CC:     <kuba@...nel.org>, <vivien.didelot@...il.com>,
        <f.fainelli@...il.com>, <davem@...emloft.net>,
        <UNGLinuxDriver@...rochip.com>, <Woojung.Huh@...rochip.com>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: [PATCH net-next 4/8] net: dsa: microchip: add support for phylink management

Support for phylink_validate() and reused KSZ commmon API for
phylink_mac_link_down() operation

Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
---
 drivers/net/dsa/microchip/lan937x_main.c | 40 ++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index 41f7f5f8f435..b38735e36aef 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -327,6 +327,44 @@ static int lan937x_get_max_mtu(struct dsa_switch *ds, int port)
 	return FR_MAX_SIZE;
 }
 
+static void lan937x_phylink_validate(struct dsa_switch *ds, int port,
+				     unsigned long *supported,
+			  struct phylink_link_state *state)
+{
+	struct ksz_device *dev = ds->priv;
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+
+	if (phy_interface_mode_is_rgmii(state->interface) ||
+	    state->interface == PHY_INTERFACE_MODE_SGMII ||
+		state->interface == PHY_INTERFACE_MODE_RMII ||
+		state->interface == PHY_INTERFACE_MODE_MII ||
+		lan937x_is_internal_tx_phy_port(dev, port)) {
+		phylink_set(mask, 10baseT_Half);
+		phylink_set(mask, 10baseT_Full);
+		phylink_set(mask, 100baseT_Half);
+		phylink_set(mask, 100baseT_Full);
+		phylink_set(mask, Autoneg);
+		phylink_set_port_modes(mask);
+		phylink_set(mask, Pause);
+		phylink_set(mask, Asym_Pause);
+	}
+	/*  For RGMII & SGMII interfaces */
+	if (phy_interface_mode_is_rgmii(state->interface) ||
+	    state->interface == PHY_INTERFACE_MODE_SGMII) {
+		phylink_set(mask, 1000baseT_Full);
+	}
+	/* For T1 PHY */
+	if (lan937x_is_internal_t1_phy_port(dev, port)) {
+		phylink_set(mask, 100baseT_Full);
+		phylink_set_port_modes(mask);
+	}
+
+	bitmap_and(supported, supported, mask,
+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
+	bitmap_and(state->advertising, state->advertising, mask,
+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
+}
+
 const struct dsa_switch_ops lan937x_switch_ops = {
 	.get_tag_protocol	= lan937x_get_tag_protocol,
 	.setup			= lan937x_setup,
@@ -339,6 +377,8 @@ const struct dsa_switch_ops lan937x_switch_ops = {
 	.port_fast_age		= ksz_port_fast_age,
 	.port_max_mtu		= lan937x_get_max_mtu,
 	.port_change_mtu	= lan937x_change_mtu,
+	.phylink_validate	= lan937x_phylink_validate,
+	.phylink_mac_link_down	= ksz_mac_link_down,
 };
 
 int lan937x_switch_register(struct ksz_device *dev)
-- 
2.25.1