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Message-ID: <20210128102124.5r7ztgehw2iqbbl6@gilmour>
Date: Thu, 28 Jan 2021 11:21:24 +0100
From: Maxime Ripard <maxime@...no.tech>
To: Andre Przywara <andre.przywara@....com>
Cc: Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Samuel Holland <samuel@...lland.org>,
Icenowy Zheng <icenowy@...c.io>, Rob Herring <robh@...nel.org>,
Clément Péron <peron.clem@...il.com>,
Shuosheng Huang <huangshuosheng@...winnertech.com>,
Yangtao Li <tiny.windzz@...il.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com,
Alexandre Torgue <alexandre.torgue@...com>,
"David S . Miller" <davem@...emloft.net>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Jakub Kicinski <kuba@...nel.org>,
Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org
Subject: Re: [PATCH v5 16/20] net: stmmac: dwmac-sun8i: Prepare for second
EMAC clock register
On Wed, Jan 27, 2021 at 05:24:56PM +0000, Andre Przywara wrote:
> The Allwinner H616 SoC has two EMAC controllers, with the second one
> being tied to the internal PHY, but also using a separate EMAC clock
> register.
>
> To tell the driver about which clock register to use, we add a parameter
> to our syscon phandle. The driver will use this value as an index into
> the regmap, so that we can address more than the first register, if
> needed.
>
> Signed-off-by: Andre Przywara <andre.przywara@....com>
Acked-by: Maxime Ripard <mripard@...nel.org>
Maxime
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