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Message-ID: <CAJMQK-igcZXrnTb6pA3S6X_uTF6aGhKFLAHtdet62od9vVx4rg@mail.gmail.com>
Date: Thu, 28 Jan 2021 19:12:20 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: CK Hu <ck.hu@...iatek.com>
Cc: Philipp Zabel <p.zabel@...gutronix.de>,
Matthias Brugger <matthias.bgg@...il.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Mark Rutland <mark.rutland@....com>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Devicetree List <devicetree@...r.kernel.org>,
lkml <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Yongqiang Niu <yongqiang.niu@...iatek.com>
Subject: Re: [PATCH v11 3/9] drm/mediatek: add RDMA fifo size error handle
On Thu, Jan 28, 2021 at 3:52 PM CK Hu <ck.hu@...iatek.com> wrote:
>
> Hi, Hsin-Yi:
>
> On Thu, 2021-01-28 at 15:27 +0800, Hsin-Yi Wang wrote:
> > From: Yongqiang Niu <yongqiang.niu@...iatek.com>
> >
> > This patch add RDMA fifo size error handle
> > rdma fifo size will not always bigger than the calculated threshold
> > if that case happened, we need set fifo size as the threshold
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> > Signed-off-by: Hsin-Yi Wang <hsinyi@...omium.org>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > index b84004394970f..04b9542010b00 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> > * account for blanking, and with a pixel depth of 4 bytes:
> > */
> > threshold = width * height * vrefresh * 4 * 7 / 1000000;
> > +
> > + if (threshold > rdma_fifo_size)
> > + threshold = rdma_fifo_size;
> > +
>
> Please see the discussion in [1].
>
> [1]
> https://patchwork.kernel.org/project/linux-mediatek/patch/1607591262-21736-6-git-send-email-yongqiang.niu@mediatek.com/
>
> Regards,
> CK
>
Hi CK,
Even if we set threshold to
threshold = RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) * width * height *
vrefresh / 2 / MAX_WIDTH / MAX_HEIGHT / MAX_VREFRESH;
I'm not sure what value MAX_WIDTH, MAX_HEIGHT, and MAX_VREFRESH should
set to for each SoC.
Since there's no conclusion yet, I'll drop this patch in the series,
as this seems not an mt8183 specific fix.
> > reg = RDMA_FIFO_UNDERFLOW_EN |
> > RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
>
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