linux-kernel - Re: [PATCH v5 0/4] ARM: Add support for Hisilicon Kunpeng L3 cache controller

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Message-ID: <036c026a-f6ec-e029-95b4-e715c93f2c21@huawei.com>
Date:   Thu, 28 Jan 2021 09:30:17 +0800
From:   "Leizhen (ThunderTown)" <thunder.leizhen@...wei.com>
To:     Russell King <rmk+kernel@....linux.org.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Will Deacon <will.deacon@....com>,
        "Haojian Zhuang" <haojian.zhuang@...il.com>,
        Arnd Bergmann <arnd@...db.de>,
        Rob Herring <robh+dt@...nel.org>,
        Wei Xu <xuwei5@...ilicon.com>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 0/4] ARM: Add support for Hisilicon Kunpeng L3 cache
 controller

Hi Russell and Arnd:
  Do you have time to review it?


On 2021/1/16 11:27, Zhen Lei wrote:
> v4 --> v5:
> 1. Add SoC macro ARCH_KUNPENG50X, and the Kunpeng L3 cache controller only enabled
>    on that platform.
> 2. Require the compatible string of the Kunpeng L3 cache controller must have a
>    relevant name on a specific SoC. For example:
>    compatible = "hisilicon,kunpeng509-l3cache", "hisilicon,kunpeng-l3cache";
> 
> v3 --> v4:
> Rename the compatible string from "hisilicon,l3cache" to "hisilicon,kunpeng-l3cache".
> Then adjust the file name, configuration option name, and description accordingly.
> 
> v2 --> v3:
> Add Hisilicon L3 cache controller driver and its document. That's: patch 2-3.
> 
> v1 --> v2:
> Discard the middle-tier functions and do silent narrowing cast in the outcache
> hook functions. For example:
> -static void l2c220_inv_range(unsigned long start, unsigned long end)
> +static void l2c220_inv_range(phys_addr_t pa_start, phys_addr_t pa_end)
>  {
> +	unsigned long start = pa_start;
> +	unsigned long end = pa_end;
> 
> 
> v1:
> Do cast phys_addr_t to unsigned long by adding a middle-tier function.
> For example:
> -static void l2c220_inv_range(unsigned long start, unsigned long end)
> +static void __l2c220_inv_range(unsigned long start, unsigned long end)
>  {
>  	...
>  }
> +static void l2c220_inv_range(phys_addr_t start, phys_addr_t end)
> +{
> +  __l2c220_inv_range(start, end);
> +}
> 
> 
> Zhen Lei (4):
>   ARM: LPAE: Use phys_addr_t instead of unsigned long in outercache
>     hooks
>   ARM: hisi: add support for Kunpeng50x SoC
>   dt-bindings: arm: hisilicon: Add binding for Kunpeng L3 cache
>     controller
>   ARM: Add support for Hisilicon Kunpeng L3 cache controller
> 
>  .../arm/hisilicon/kunpeng-l3cache.yaml        |  40 +++++
>  arch/arm/include/asm/outercache.h             |   6 +-
>  arch/arm/mach-hisi/Kconfig                    |   8 +
>  arch/arm/mm/Kconfig                           |  10 ++
>  arch/arm/mm/Makefile                          |   1 +
>  arch/arm/mm/cache-feroceon-l2.c               |  15 +-
>  arch/arm/mm/cache-kunpeng-l3.c                | 153 ++++++++++++++++++
>  arch/arm/mm/cache-kunpeng-l3.h                |  30 ++++
>  arch/arm/mm/cache-l2x0.c                      |  50 ++++--
>  arch/arm/mm/cache-tauros2.c                   |  15 +-
>  arch/arm/mm/cache-uniphier.c                  |   6 +-
>  arch/arm/mm/cache-xsc3l2.c                    |  12 +-
>  12 files changed, 317 insertions(+), 29 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml
>  create mode 100644 arch/arm/mm/cache-kunpeng-l3.c
>  create mode 100644 arch/arm/mm/cache-kunpeng-l3.h
>