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Message-ID: <YBNg5iRtKp9Twqpe@lunn.ch>
Date: Fri, 29 Jan 2021 02:12:06 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
Cc: olteanv@...il.com, netdev@...r.kernel.org, robh+dt@...nel.org,
kuba@...nel.org, vivien.didelot@...il.com, f.fainelli@...il.com,
davem@...emloft.net, UNGLinuxDriver@...rochip.com,
Woojung.Huh@...rochip.com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH net-next 4/8] net: dsa: microchip: add support for
phylink management
> + /* For T1 PHY */
> + if (lan937x_is_internal_t1_phy_port(dev, port)) {
> + phylink_set(mask, 100baseT_Full);
> + phylink_set_port_modes(mask);
Since this is a T1 PHY, you should be using 100baseT1_Full.
This might be the first user of this for phylink, so please test this
actually works.
Andrew
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