linux-kernel - Re: [NEEDS-REVIEW] [PATCH v18 05/25] x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <43f264df-2f3a-ea4c-c737-85cdc6714bd8@intel.com>
Date:   Fri, 29 Jan 2021 14:35:01 -0800
From:   "Yu, Yu-cheng" <yu-cheng.yu@...el.com>
To:     Dave Hansen <dave.hansen@...el.com>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
        linux-doc@...r.kernel.org, linux-mm@...ck.org,
        linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
        Arnd Bergmann <arnd@...db.de>,
        Andy Lutomirski <luto@...nel.org>,
        Balbir Singh <bsingharora@...il.com>,
        Borislav Petkov <bp@...en8.de>,
        Cyrill Gorcunov <gorcunov@...il.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Eugene Syromiatnikov <esyr@...hat.com>,
        Florian Weimer <fweimer@...hat.com>,
        "H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
        Jonathan Corbet <corbet@....net>,
        Kees Cook <keescook@...omium.org>,
        Mike Kravetz <mike.kravetz@...cle.com>,
        Nadav Amit <nadav.amit@...il.com>,
        Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
        Peter Zijlstra <peterz@...radead.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
        Dave Martin <Dave.Martin@....com>,
        Weijiang Yang <weijiang.yang@...el.com>,
        Pengfei Xu <pengfei.xu@...el.com>,
        Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [NEEDS-REVIEW] [PATCH v18 05/25] x86/fpu/xstate: Introduce CET
 MSR and XSAVES supervisor states

On 1/29/2021 1:00 PM, Dave Hansen wrote:
> On 1/27/21 1:25 PM, Yu-cheng Yu wrote:
>> @@ -135,6 +135,8 @@ enum xfeature {
>>   #define XFEATURE_MASK_PT		(1 << XFEATURE_PT_UNIMPLEMENTED_SO_FAR)
>>   #define XFEATURE_MASK_PKRU		(1 << XFEATURE_PKRU)
>>   #define XFEATURE_MASK_PASID		(1 << XFEATURE_PASID)
>> +#define XFEATURE_MASK_CET_USER		(1 << XFEATURE_CET_USER)
>> +#define XFEATURE_MASK_CET_KERNEL	(1 << XFEATURE_CET_KERNEL)
>>   #define XFEATURE_MASK_LBR		(1 << XFEATURE_LBR)
>>   
>>   #define XFEATURE_MASK_FPSSE		(XFEATURE_MASK_FP | XFEATURE_MASK_SSE)
>> @@ -237,6 +239,23 @@ struct pkru_state {
>>   	u32				pad;
>>   } __packed;
>>   
>> +/*
>> + * State component 11 is Control-flow Enforcement user states
>> + */
>> +struct cet_user_state {
>> +	u64 user_cet;			/* user control-flow settings */
>> +	u64 user_ssp;			/* user shadow stack pointer */
>> +};
> 
> Andy Cooper just mentioned on IRC about this nugget in the spec:
> 
> 	XRSTORS on CET state will do reserved bit and canonicality
> 	checks on the state in similar manner as done by the WRMSR to
> 	these state elements.
> 
> We're using copy_kernel_to_xregs_err(), so the #GP *should* be OK.
> Could we prove this out in practice, please?
> 

Do we want to verify that setting reserved bits in CET XSAVES states 
triggers GP?  Then, yes, I just verified it again.  Thanks for 
reminding.  Do we have any particular case relating to this?

--
Yu-cheng