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Message-ID: <CAA8EJprOYwe8pSc+QzptVjxWKiTG-jGxoUh0aa5JTGq-4nnt+g@mail.gmail.com>
Date: Sat, 30 Jan 2021 19:16:10 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Benjamin Li <benl@...areup.com>
Cc: Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
AngeloGioacchino Del Regno <kholk11@...il.com>,
Harigovindan P <harigovi@...eaurora.org>,
Konrad Dybcio <konradybcio@...il.com>,
zhengbin <zhengbin13@...wei.com>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@...r.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@...ts.freedesktop.org>,
freedreno <freedreno@...ts.freedesktop.org>,
open list <linux-kernel@...r.kernel.org>,
Anibal Limon <anibal.limon@...aro.org>
Subject: Re: [PATCH] drm/msm/dsi: save PLL registers across first PHY reset
On Sat, 30 Jan 2021 at 05:00, Benjamin Li <benl@...areup.com> wrote:
>
>
> On 10/30/20 6:55 AM, Dmitry Baryshkov wrote:
> > Hello,
> >
> > On 07/10/2020 03:10, benl-kernelpatches@...areup.com wrote:
> >> From: Benjamin Li <benl@...areup.com>
> >>
> >> Take advantage of previously-added support for persisting PLL
> >> registers across DSI PHY disable/enable cycles (see 328e1a6
> >> 'drm/msm/dsi: Save/Restore PLL status across PHY reset') to
> >> support persisting across the very first DSI PHY enable at
> >> boot.
> >
> > Interesting enough, this breaks exactly on 8016. On DB410c with latest bootloader and w/o splash screen this patch causes boot freeze. Without this patch the board would successfully boot with display routed to HDMI.
>
> Hi Dimtry,
>
> Thanks for your fix for the DB410c breakage ("drm/msm/dsi: do not
> try reading 28nm vco rate if it's not enabled") that this patch
> causes.
>
> I re-tested my patch on top of qcom/linux for-next (3e6a8ce094759)
> which now has your fix, on a DB410c with HDMI display and no splash
> (which seems to be the default using the Linaro SD card image's LK),
> and indeed it is fixed.
>
> I assume you already also did the same & are okay with this going in.
> Appreciate the testing!
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Tested on RB5 and Dragonboard 845c (RB3).
--
With best wishes
Dmitry
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