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Message-ID: <4b702785-9c30-fa24-e5bc-ad3aa9457a5c@gmail.com>
Date: Sun, 31 Jan 2021 14:23:33 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: James Liao <jamesjj.liao@...iatek.com>,
Rob Herring <robh+dt@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
srv_heupstream@...iatek.com
Subject: Re: [PATCH] arm64: dts: mt8192: Add cpu-idle-states
On 22/12/2020 05:58, James Liao wrote:
> Add idle states for cpu-off and cluster-off.
>
> Signed-off-by: James Liao <jamesjj.liao@...iatek.com>
> ---
Applied to v5.11-next/dts64
Thanks!
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 44 ++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> This patch bases on v5.10 and [1], adds idle-states for MT8192 CPUs.
>
> [1] https://lore.kernel.org/linux-arm-kernel/20201030092207.26488-2-seiya.wang@mediatek.com/
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index e12e024de122..c7f2ec9ea4f1 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -39,6 +39,7 @@
> reg = <0x000>;
> enable-method = "psci";
> clock-frequency = <1701000000>;
> + cpu-idle-states = <&cpuoff_l &clusteroff_l>;
> next-level-cache = <&l2_0>;
> capacity-dmips-mhz = <530>;
> };
> @@ -49,6 +50,7 @@
> reg = <0x100>;
> enable-method = "psci";
> clock-frequency = <1701000000>;
> + cpu-idle-states = <&cpuoff_l &clusteroff_l>;
> next-level-cache = <&l2_0>;
> capacity-dmips-mhz = <530>;
> };
> @@ -59,6 +61,7 @@
> reg = <0x200>;
> enable-method = "psci";
> clock-frequency = <1701000000>;
> + cpu-idle-states = <&cpuoff_l &clusteroff_l>;
> next-level-cache = <&l2_0>;
> capacity-dmips-mhz = <530>;
> };
> @@ -69,6 +72,7 @@
> reg = <0x300>;
> enable-method = "psci";
> clock-frequency = <1701000000>;
> + cpu-idle-states = <&cpuoff_l &clusteroff_l>;
> next-level-cache = <&l2_0>;
> capacity-dmips-mhz = <530>;
> };
> @@ -79,6 +83,7 @@
> reg = <0x400>;
> enable-method = "psci";
> clock-frequency = <2171000000>;
> + cpu-idle-states = <&cpuoff_b &clusteroff_b>;
> next-level-cache = <&l2_1>;
> capacity-dmips-mhz = <1024>;
> };
> @@ -89,6 +94,7 @@
> reg = <0x500>;
> enable-method = "psci";
> clock-frequency = <2171000000>;
> + cpu-idle-states = <&cpuoff_b &clusteroff_b>;
> next-level-cache = <&l2_1>;
> capacity-dmips-mhz = <1024>;
> };
> @@ -99,6 +105,7 @@
> reg = <0x600>;
> enable-method = "psci";
> clock-frequency = <2171000000>;
> + cpu-idle-states = <&cpuoff_b &clusteroff_b>;
> next-level-cache = <&l2_1>;
> capacity-dmips-mhz = <1024>;
> };
> @@ -109,6 +116,7 @@
> reg = <0x700>;
> enable-method = "psci";
> clock-frequency = <2171000000>;
> + cpu-idle-states = <&cpuoff_b &clusteroff_b>;
> next-level-cache = <&l2_1>;
> capacity-dmips-mhz = <1024>;
> };
> @@ -158,6 +166,42 @@
> l3_0: l3-cache {
> compatible = "cache";
> };
> +
> + idle-states {
> + entry-method = "arm,psci";
> + cpuoff_l: cpuoff_l {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x00010001>;
> + local-timer-stop;
> + entry-latency-us = <55>;
> + exit-latency-us = <140>;
> + min-residency-us = <780>;
> + };
> + cpuoff_b: cpuoff_b {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x00010001>;
> + local-timer-stop;
> + entry-latency-us = <35>;
> + exit-latency-us = <145>;
> + min-residency-us = <720>;
> + };
> + clusteroff_l: clusteroff_l {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x01010002>;
> + local-timer-stop;
> + entry-latency-us = <60>;
> + exit-latency-us = <155>;
> + min-residency-us = <860>;
> + };
> + clusteroff_b: clusteroff_b {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x01010002>;
> + local-timer-stop;
> + entry-latency-us = <40>;
> + exit-latency-us = <155>;
> + min-residency-us = <780>;
> + };
> + };
> };
>
> pmu-a55 {
>
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