linux-kernel - Re: [PATCH] arm64: dts: mediatek: Correct i2c clock of MT8192

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Message-ID: <3a8411e6-02e7-1c05-7063-aa12dc286ce0@gmail.com>
Date:   Sun, 31 Jan 2021 15:15:52 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     qii.wang@...iatek.com, robh+dt@...nel.org
Cc:     mark.rutland@....com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
        leilk.liu@...iatek.com
Subject: Re: [PATCH] arm64: dts: mediatek: Correct i2c clock of MT8192



On 21/12/2020 13:26, qii.wang@...iatek.com wrote:
> From: Qii Wang <qii.wang@...iatek.com>
> 
> imp wrapper clock is the i2c source clock of MT8192
> 
> Signed-off-by: Qii Wang <qii.wang@...iatek.com>
> ---

Thanks for your patch. The next time please provide information about any
out-of-tree series that are needed to apply cleanly.

Regards,
Matthias

>  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 43 ++++++++++++++++++++++++--------
>  1 file changed, 33 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index faea0d9..9c194a8 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -17,6 +17,19 @@
>  	#address-cells = <2>;
>  	#size-cells = <2>;
>  
> +	aliases {
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c6 = &i2c6;
> +		i2c7 = &i2c7;
> +		i2c8 = &i2c8;
> +		i2c9 = &i2c9;
> +	};
> +
>  	clk26m: oscillator0 {
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
> @@ -593,7 +606,8 @@
>  			reg = <0 0x11cb0000 0 0x1000>,
>  			      <0 0x10217300 0 0x80>;
>  			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_e CLK_IMP_IIC_WRAP_E_I2C3>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -612,7 +626,8 @@
>  			reg = <0 0x11d00000 0 0x1000>,
>  			      <0 0x10217600 0 0x180>;
>  			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_s CLK_IMP_IIC_WRAP_S_I2C7>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -625,7 +640,8 @@
>  			reg = <0 0x11d01000 0 0x1000>,
>  			      <0 0x10217780 0 0x180>;
>  			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_s CLK_IMP_IIC_WRAP_S_I2C8>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -638,7 +654,8 @@
>  			reg = <0 0x11d02000 0 0x1000>,
>  			      <0 0x10217900 0 0x180>;
>  			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_s CLK_IMP_IIC_WRAP_S_I2C9>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -657,7 +674,8 @@
>  			reg = <0 0x11d20000 0 0x1000>,
>  			      <0 0x10217100 0 0x80>;
>  			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_ws CLK_IMP_IIC_WRAP_WS_I2C1>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -670,7 +688,8 @@
>  			reg = <0 0x11d21000 0 0x1000>,
>  			      <0 0x10217180 0 0x180>;
>  			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_ws CLK_IMP_IIC_WRAP_WS_I2C2>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -683,7 +702,8 @@
>  			reg = <0 0x11d22000 0 0x1000>,
>  			      <0 0x10217380 0 0x180>;
>  			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_ws CLK_IMP_IIC_WRAP_WS_I2C4>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -702,7 +722,8 @@
>  			reg = <0 0x11e00000 0 0x1000>,
>  			      <0 0x10217500 0 0x80>;
>  			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_w CLK_IMP_IIC_WRAP_W_I2C5>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -721,7 +742,8 @@
>  			reg = <0 0x11f00000 0 0x1000>,
>  			      <0 0x10217080 0 0x80>;
>  			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_n CLK_IMP_IIC_WRAP_N_I2C0>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
> @@ -734,7 +756,8 @@
>  			reg = <0 0x11f01000 0 0x1000>,
>  			      <0 0x10217580 0 0x80>;
>  			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&imp_iic_wrap_n CLK_IMP_IIC_WRAP_N_I2C6>,
> +				 <&infracfg CLK_INFRA_AP_DMA>;
>  			clock-names = "main", "dma";
>  			clock-div = <1>;
>  			#address-cells = <1>;
>