[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210131013853.55810-4-konrad.dybcio@somainline.org>
Date: Sun, 31 Jan 2021 02:38:34 +0100
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: phone-devel@...r.kernel.org
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 03/18] arm64: dts: qcom: msm8994: Sort hwlock properly
Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
---
arch/arm64/boot/dts/qcom/msm8994.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index a6148b00e82c..60e04514af70 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -155,6 +155,12 @@ memory {
reg = <0 0 0 0>;
};
+ tcsr_mutex: hwlock {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x80>;
+ #hwlock-cells = <1>;
+ };
+
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
@@ -1003,12 +1009,6 @@ sdc2_data_off: sdc2-data-off {
};
};
- tcsr_mutex: hwlock {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_regs 0 0x80>;
- #hwlock-cells = <1>;
- };
-
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 0xff08>,
--
2.30.0
Powered by blists - more mailing lists