lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87wnvrbmqx.fsf@nanos.tec.linutronix.de>
Date:   Mon, 01 Feb 2021 20:40:06 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
Cc:     Serge Belyshev <belyshev@...ni.sinp.msu.ru>,
        Dirk Gouders <dirk@...ders.net>,
        Mickaël Salaün <mic@...ikod.net>,
        LKML <linux-kernel@...r.kernel.org>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Jason Gunthorpe <jgg@...pe.ca>,
        Miroslav Lichvar <mlichvar@...hat.com>,
        John Stultz <john.stultz@...aro.org>,
        Prarit Bhargava <prarit@...hat.com>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        linux-rtc@...r.kernel.org, Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH V2] rtc: mc146818: Dont test for bit 0-5 in Register D

On Mon, Feb 01 2021 at 11:32, Linus Torvalds wrote:
> On Mon, Feb 1, 2021 at 11:24 AM Thomas Gleixner <tglx@...utronix.de> wrote:
>>
>> While it cures the problem on the reporters machine it breaks machines
>> with Intel chipsets which use bit 0-5 of the D register. So check only
>> for bit 6 being 0 which is the case on these Intel machines as well.
>
> This looks fine, but it might also be worth it simply just checking
> for the only really special value: 0xff, and going "ok, that looks
> like missing hardware".
>
> That's what a few other drivers historically do in their probing
> routines, so it's not unheard of (ie you can find drivers doing that
> kind of
>
>         /* If we read 0xff from the LSR, there is no UART here. */
>         if (inb(.. port ..) == 0xff)
>
> in their init routines.
>
> Not a big deal either way, I just think it would be more in like with
> what other places do in similar situations

Yeah, we can do that as well. Either way is fine.

Thanks,

        tglx

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ