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Message-ID: <20210201231720.GB1475392@xps15>
Date: Mon, 1 Feb 2021 16:17:20 -0700
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: Anshuman Khandual <anshuman.khandual@....com>
Cc: linux-arm-kernel@...ts.infradead.org, coresight@...ts.linaro.org,
suzuki.poulose@....com, mike.leach@...aro.org,
lcherian@...vell.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 01/14] coresight: etm-perf: Allow an event to use
different sinks
Hi Anshuman,
I have started reviewing this set. As it is quite voluminous comments will
come over serveral days. I will let you know when I am done.
On Wed, Jan 27, 2021 at 02:25:25PM +0530, Anshuman Khandual wrote:
> From: Suzuki K Poulose <suzuki.poulose@....com>
>
> When there are multiple sinks on the system, in the absence
> of a specified sink, it is quite possible that a default sink
> for an ETM could be different from that of another ETM. However
> we do not support having multiple sinks for an event yet. This
> patch allows the event to use the default sinks on the ETMs
> where they are scheduled as long as the sinks are of the same
> type.
>
> e.g, if we have 1x1 topology with per-CPU ETRs, the event can
> use the per-CPU ETR for the session. However, if the sinks
> are of different type, e.g TMC-ETR on one and a custom sink
> on another, the event will only trace on the first detected
> sink.
>
I found the above changelog very confusing - I read it several times and still
couldn't get all of it. In the end this patch prevents sinks of different types
from being used for session, and this is what the text should reflect.
> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
> Cc: Mike Leach <mike.leach@...aro.org>
> Tested-by: Linu Cherian <lcherian@...vell.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
> ---
> drivers/hwtracing/coresight/coresight-etm-perf.c | 48 +++++++++++++++++++-----
> 1 file changed, 38 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index bdc34ca..eb9e7e9 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -204,6 +204,13 @@ static void etm_free_aux(void *data)
> schedule_work(&event_data->work);
> }
>
> +static bool sinks_match(struct coresight_device *a, struct coresight_device *b)
> +{
> + if (!a || !b)
> + return false;
> + return (sink_ops(a) == sink_ops(b));
Yes
> +}
> +
> static void *etm_setup_aux(struct perf_event *event, void **pages,
> int nr_pages, bool overwrite)
> {
> @@ -212,6 +219,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> cpumask_t *mask;
> struct coresight_device *sink = NULL;
struct coresight_device *user_sink = NULL;
> struct etm_event_data *event_data = NULL;
> + bool sink_forced = false;
>
> event_data = alloc_event_data(cpu);
> if (!event_data)
> @@ -222,6 +230,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> if (event->attr.config2) {
> id = (u32)event->attr.config2;
> sink = coresight_get_sink_by_id(id);
user_sink = coresight_get_sink_by_id(id);
> + sink_forced = true;
> }
>
> mask = &event_data->mask;
> @@ -235,7 +244,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> */
> for_each_cpu(cpu, mask) {
> struct list_head *path;
> - struct coresight_device *csdev;
struct coresight_device *last_sink = NULL;
> + struct coresight_device *csdev, *new_sink;
>
> csdev = per_cpu(csdev_src, cpu);
> /*
> @@ -249,21 +258,35 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> }
>
> /*
> - * No sink provided - look for a default sink for one of the
> - * devices. At present we only support topology where all CPUs
> - * use the same sink [N:1], so only need to find one sink. The
> - * coresight_build_path later will remove any CPU that does not
> - * attach to the sink, or if we have not found a sink.
> + * No sink provided - look for a default sink for all the devices.
> + * We only support multiple sinks, only if all the default sinks
> + * are of the same type, so that the sink buffer can be shared
> + * as the event moves around. We don't trace on a CPU if it can't
s/can't/can't./
> + *
Extra line
> */
> - if (!sink)
> - sink = coresight_find_default_sink(csdev);
> + if (!sink_forced) {
> + new_sink = coresight_find_default_sink(csdev);
> + if (!new_sink) {
> + cpumask_clear_cpu(cpu, mask);
> + continue;
> + }
> + /* Skip checks for the first sink */
> + if (!sink) {
> + sink = new_sink;
> + } else if (!sinks_match(new_sink, sink)) {
> + cpumask_clear_cpu(cpu, mask);
> + continue;
> + }
> + } else {
> + new_sink = sink;
> + }
if (!user_sink) {
/* find default sink for this CPU */
sink = coresight_find_default_sink(csdev);
if (!sink) {
cpumask_clear_cpu(cpu, mask);
continue;
}
/* Chech new sink with last sink */
if (last_sink && !sink_match(last_sink, sink)) {
cpumask_clear_cpu(cpu, mask);
continue;
}
last_sink = sink;
} else {
sink = user_sink;
}
>
> /*
> * Building a path doesn't enable it, it simply builds a
> * list of devices from source to sink that can be
> * referenced later when the path is actually needed.
> */
> - path = coresight_build_path(csdev, sink);
> + path = coresight_build_path(csdev, new_sink);
> if (IS_ERR(path)) {
> cpumask_clear_cpu(cpu, mask);
> continue;
> @@ -284,7 +307,12 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
> goto err;
>
> - /* Allocate the sink buffer for this session */
> + /*
> + * Allocate the sink buffer for this session. All the sinks
> + * where this event can be scheduled are ensured to be of the
> + * same type. Thus the same sink configuration is used by the
> + * sinks.
> + */
> event_data->snk_config =
> sink_ops(sink)->alloc_buffer(sink, event, pages,
> nr_pages, overwrite);
> --
> 2.7.4
>
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