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Message-ID: <06015f0f-dece-a3e5-66d4-814069af4449@monstr.eu>
Date: Mon, 1 Feb 2021 10:40:53 +0100
From: Michal Simek <monstr@...str.eu>
To: Michal Simek <michal.simek@...inx.com>,
linux-kernel@...r.kernel.org, git@...inx.com
Cc: Kalyani Akula <kalyani.akula@...inx.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 0/3] arm64: dts: zynqmp: Enable and Wire DP
Hi,
On 1/21/21 1:36 PM, Michal Simek wrote:
> Hi,
>
> I am updating DT patches which were there part of DP v11 series sent by
> Laurent in past [1]. Patches have been removed in v12 [2].
> The series is rebased on the top of [3] which wired si5341 clock chip.
>
> [1] http://lore.kernel.org/r/20200318153728.25843-1-laurent.pinchart@ideasonboard.com
> [2] http://lore.kernel.org/r/20200718001347.25451-1-laurent.pinchart@ideasonboard.com
> [3] http://lore.kernel.org/r/cover.1611224800.git.michal.simek@xilinx.com
>
> Thanks,
> Michal
>
>
> Laurent Pinchart (2):
> arm64: dts: zynqmp: Add DPDMA node
> arm64: dts: zynqmp: Wire up the DisplayPort subsystem
>
> Michal Simek (1):
> arm64: dts: zynqmp: Add DisplayPort subsystem
>
> .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 10 ++++++
> .../boot/dts/xilinx/zynqmp-zcu100-revC.dts | 31 ++++++++++++++++++
> .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 10 ++++++
> .../boot/dts/xilinx/zynqmp-zcu104-revA.dts | 11 +++++++
> .../boot/dts/xilinx/zynqmp-zcu104-revC.dts | 11 +++++++
> .../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 11 +++++++
> .../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 11 +++++++
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 32 +++++++++++++++++++
> 8 files changed, 127 insertions(+)
>
Applied all.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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