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Message-Id: <20210201105657.1642825-1-iskren.chernev@gmail.com>
Date: Mon, 1 Feb 2021 12:56:54 +0200
From: Iskren Chernev <iskren.chernev@...il.com>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Iskren Chernev <iskren.chernev@...il.com>,
Samuel Pascua <pascua.samuel.14@...il.com>,
Alexey Minnekhanov <alexeymin@...tmarketos.org>,
Brian Masney <masneyb@...tation.org>,
phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht
Subject: [PATCH v5 1/4] ARM: dts: qcom: msm8974: add gpu support
From: Brian Masney <masneyb@...tation.org>
Add support for the a3xx GPU. opp_table is chosen to include lower
frequencies common to all different msm8974 variants.
Signed-off-by: Brian Masney <masneyb@...tation.org>
[iskren.chernev@...il.com: change after v1]
Signed-off-by: Iskren Chernev <iskren.chernev@...il.com>
---
Update the panel/dsi patch according to new dt bindigs in
panel-v2: https://lkml.org/lkml/2021/2/1/313
v1: https://lkml.org/lkml/2020/12/30/322
v2: https://lkml.org/lkml/2021/1/24/142
v3: https://lkml.org/lkml/2021/1/25/398
v4: https://lkml.org/lkml/2021/1/28/374
Changes in v5:
- panel/dsi patch contains 2 regulators, now that the display can turn off
arch/arm/boot/dts/qcom-msm8974.dtsi | 43 ++++++++++++++++++++++++++
arch/arm/boot/dts/qcom-msm8974pro.dtsi | 5 +++
2 files changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 51f5f904f9eb..c65d33591efa 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -1399,6 +1399,49 @@ cnoc: interconnect@...80000 {
<&rpmcc RPM_SMD_CNOC_A_CLK>;
};
+ gpu: adreno@...00000 {
+ status = "disabled";
+
+ compatible = "qcom,adreno-330.1",
+ "qcom,adreno";
+ reg = <0xfdb00000 0x10000>;
+ reg-names = "kgsl_3d0_reg_memory";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "kgsl_3d0_irq";
+ clock-names = "core",
+ "iface",
+ "mem_iface";
+ clocks = <&mmcc OXILI_GFX3D_CLK>,
+ <&mmcc OXILICX_AHB_CLK>,
+ <&mmcc OXILICX_AXI_CLK>;
+ sram = <&gmu_sram>;
+ power-domains = <&mmcc OXILICX_GDSC>;
+ operating-points-v2 = <&gpu_opp_table>;
+
+ interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
+ <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
+ interconnect-names = "gfx-mem",
+ "ocmem";
+
+ // iommus = <&gpu_iommu 0>;
+
+ gpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+
+ opp-320000000 {
+ opp-hz = /bits/ 64 <320000000>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ };
+
+ opp-27000000 {
+ opp-hz = /bits/ 64 <27000000>;
+ };
+ };
+ };
+
mdss: mdss@...00000 {
status = "disabled";
diff --git a/arch/arm/boot/dts/qcom-msm8974pro.dtsi b/arch/arm/boot/dts/qcom-msm8974pro.dtsi
index 6740a4cb7da8..b64c28036dd0 100644
--- a/arch/arm/boot/dts/qcom-msm8974pro.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974pro.dtsi
@@ -14,5 +14,10 @@ sdhci@...24900 {
clock-controller@...00000 {
compatible = "qcom,gcc-msm8974pro";
};
+
+ adreno@...00000 {
+ compatible = "qcom,adreno-330.2",
+ "qcom,adreno";
+ };
};
};
base-commit: fd821bf0ed9a7db09d2e007df697f4d9ecfda99a
prerequisite-patch-id: b55fe8485f5dbf29159fb3130d81d93926be23d1
prerequisite-patch-id: 47e70201c831fab5fb987d9b0092ad46e1855efc
--
2.30.0
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