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Date: Mon, 1 Feb 2021 15:40:07 +0200
From: Sakari Ailus <sakari.ailus@....fi>
To: Robert Foss <robert.foss@...aro.org>
Cc: agross@...nel.org, bjorn.andersson@...aro.org, todor.too@...il.com,
mchehab@...nel.org, robh+dt@...nel.org, catalin.marinas@....com,
will@...nel.org, shawnguo@...nel.org, leoyang.li@....com,
geert+renesas@...der.be, arnd@...db.de, Anson.Huang@....com,
michael@...le.cc, agx@...xcpu.org, max.oss.09@...il.com,
angelogioacchino.delregno@...ainline.org,
linux-arm-msm@...r.kernel.org, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
AngeloGioacchino Del Regno <kholk11@...il.com>,
Rob Herring <robh@...nel.org>,
Andrey Konovalov <andrey.konovalov@...aro.org>,
Tomasz Figa <tfiga@...omium.org>,
Azam Sadiq Pasha Kapatrala Syed <akapatra@...cinc.com>,
Sarvesh Sridutt <Sarvesh.Sridutt@...rtwirelesscompute.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Jonathan Marek <jonathan@...ek.ca>
Subject: Re: [PATCH v3 10/22] media: camss: Add support for CSIPHY hardware
version Titan 170
Hi Robert,
On Wed, Jan 27, 2021 at 03:49:18PM +0100, Robert Foss wrote:
> Add register definitions for version 170 of the Titan architecture
> and implement support for the CSIPHY subdevice.
>
> Signed-off-by: Robert Foss <robert.foss@...aro.org>
> ---
> .../qcom/camss/camss-csiphy-3ph-1-0.c | 182 ++++++++++++++++--
> .../media/platform/qcom/camss/camss-csiphy.c | 66 +++++--
> drivers/media/platform/qcom/camss/camss.c | 74 +++++++
> 3 files changed, 290 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
> index 97cb9de85031..8cf1440b7d70 100644
> --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
> +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
> @@ -47,6 +47,105 @@
> #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID BIT(1)
> #define CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(n) (0x8b0 + 0x4 * (n))
>
> +#define CSIPHY_DEFAULT_PARAMS 0
> +#define CSIPHY_LANE_ENABLE 1
> +#define CSIPHY_SETTLE_CNT_LOWER_BYTE 2
> +#define CSIPHY_SETTLE_CNT_HIGHER_BYTE 3
> +#define CSIPHY_DNP_PARAMS 4
> +#define CSIPHY_2PH_REGS 5
> +#define CSIPHY_3PH_REGS 6
> +
> +struct csiphy_reg_t {
> + int32_t reg_addr;
> + int32_t reg_data;
> + int32_t delay;
> + uint32_t csiphy_param_type;
> +};
> +
> +static struct
This should be const.
> +csiphy_reg_t lane_regs_sdm845[5][14] = {
> + {
> + {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0000, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0008, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
> + {0x000c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + },
> + {
> + {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0708, 0x14, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
> + {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + },
> + {
> + {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0200, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0208, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
> + {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + },
> + {
> + {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0400, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0408, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
> + {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + },
> + {
> + {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0600, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0608, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
> + {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
> + {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
> + {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
> + },
> +};
--
Sakari Ailus
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