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Message-ID: <273b996a-8551-8383-5f9d-61ff5bd9663c@kernel.org>
Date: Mon, 1 Feb 2021 16:18:36 +0100
From: Sylwester Nawrocki <snawrocki@...nel.org>
To: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>,
mturquette@...libre.com, sboyd@...nel.org
Cc: kgene@...nel.org, krzk@...nel.org,
linux-samsung-soc@...r.kernel.org, tomasz.figa@...il.com,
linux-kernel@...r.kernel.org, cw00.choi@...sung.com,
s.nawrocki@...sung.com, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3] clk: exynos7: Keep aclk_fsys1_200 enabled
On 1/31/21 18:04, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider driver.
>
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
> ---
> Changes from v2:
> - Avoid __clk_lookup() call when enabling clock
> Changes from v1:
> - Instead of marking clock as critical, enable it manually in driver.
Acked-by: Sylwester Nawrocki <s.nawrocki@...sung.com>
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