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Date:   Tue, 2 Feb 2021 10:45:37 +0100
From:   Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
To:     Rob Herring <robh+dt@...nel.org>
Cc:     Binghui Wang <wangbinghui@...ilicon.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Xiaowei Song <songxiaowei@...ilicon.com>,
        devicetree@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        PCI <linux-pci@...r.kernel.org>
Subject: Re: [PATCH RFC 2/2] dt: pci: kirin-pcie.txt: convert it to yaml

Em Tue, 26 Jan 2021 09:49:18 -0600
Rob Herring <robh+dt@...nel.org> escreveu:

> On Tue, Jan 26, 2021 at 1:35 AM Mauro Carvalho Chehab
> <mchehab+huawei@...nel.org> wrote:
> >
> > Convert the file into a JSON description at the yaml format.
> >
> > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
> > ---
> >  .../bindings/pci/hisilicon,kirin-pcie.yaml    | 98 +++++++++++++++++++
> >  .../devicetree/bindings/pci/kirin-pcie.txt    | 50 ----------
> >  MAINTAINERS                                   |  2 +-
> >  3 files changed, 99 insertions(+), 51 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
> >  delete mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
> > new file mode 100644
> > index 000000000000..8d8112b2aca0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
> > @@ -0,0 +1,98 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/hisilicon,kirin-pcie.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: HiSilicon Kirin SoCs PCIe host DT description
> > +
> > +maintainers:
> > +  - Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
> > +
> > +description: |
> > +  Kirin PCIe host controller is based on the Synopsys DesignWare PCI core.
> > +  It shares common functions with the PCIe DesignWare core driver and
> > +  inherits common properties defined in
> > +  Documentation/devicetree/bindings/pci/designware-pcie.yaml.  
> 
> Drop this and move the $ref to here.

That doesn't pass at dt_binding_check. If I do either:

  allOf:
    - $ref: snps,pcie.yaml#

or:

  allOf:
    - $ref: /schemas/pci/pci-bus.yaml#
    - $ref: snps,pcie.yaml#

Then dt-binding-check starts to think that this DT is for a pinctrl:

	make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
	  LINT    Documentation/devicetree/bindings
	  DTEX    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dts
	./Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml:10:4: [warning] wrong indentation: expected 2 but found 3 (indentation)
	./Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml:102:10: [warning] wrong indentation: expected 10 but found 9 (indentation)
	  CHKDT   Documentation/devicetree/bindings/processed-schema-examples.json
	  SCHEMA  Documentation/devicetree/bindings/processed-schema-examples.json
	  DTC     Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml
	  CHECK   Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml
	.../Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@...00000: '#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'interrupt-names', 'interrupts', 'num-lanes', 'ranges', 'reg-names', 'reset-gpios' do not match any of the regexes: 'pinctrl-[0-9]+'
		From schema: .../Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml

No idea why. Perhaps something broken at pinctrl schema?

Thanks,
Mauro

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