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Message-ID: <20210203133138.10754-8-kostap@marvell.com>
Date:   Wed, 3 Feb 2021 15:31:34 +0200
From:   <kostap@...vell.com>
To:     <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <linux@...linux.org.uk>, <robh+dt@...nel.org>,
        <sebastian.hesselbarth@...il.com>, <gregory.clement@...tlin.com>,
        <andrew@...n.ch>, <mw@...ihalf.com>, <jaz@...ihalf.com>,
        <nadavh@...vell.com>, <stefanc@...vell.com>, <bpeled@...vell.com>,
        "Konstantin Porotchkin" <kostap@...vell.com>
Subject: [PATCH 07/11] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting

From: Konstantin Porotchkin <kostap@...vell.com>

All A7K/A8K boards are using NAND chip that supports
8 bit ECC strength. Using lower ECC strength is not recommended
by the flash manufacturer and may cause data corruption.
This patch changes the nand-ecc-strength value from 4 to 8.

Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
---
 arch/arm64/boot/dts/marvell/armada-7040-db.dts | 2 +-
 arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index f8179cadc610..39f1d393664f 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -169,7 +169,7 @@
 		label = "pxa3xx_nand-0";
 		nand-rb = <0>;
 		nand-on-flash-bbt;
-		nand-ecc-strength = <4>;
+		nand-ecc-strength = <8>;
 		nand-ecc-step-size = <512>;
 
 		partitions {
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index d96aa9e9e61c..04241dba189e 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -281,7 +281,7 @@
 		reg = <0>;
 		nand-rb = <0>;
 		nand-on-flash-bbt;
-		nand-ecc-strength = <4>;
+		nand-ecc-strength = <8>;
 		nand-ecc-step-size = <512>;
 
 		partitions {
-- 
2.17.1

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