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Message-Id: <22ca0a9a15ccdf4b520baacc5ed837f6d3a3f781.1612360002.git.michal.simek@xilinx.com>
Date: Wed, 3 Feb 2021 14:46:44 +0100
From: Michal Simek <michal.simek@...inx.com>
To: linux-kernel@...r.kernel.org, monstr@...str.eu,
michal.simek@...inx.com, git@...inx.com
Cc: Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-spi@...r.kernel.org
Subject: [PATCH] dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml
Convert spi-zynq-qspi.txt to yaml.
Signed-off-by: Michal Simek <michal.simek@...inx.com>
---
.../devicetree/bindings/spi/spi-zynq-qspi.txt | 25 --------
.../bindings/spi/xlnx,zynq-qspi.yaml | 59 +++++++++++++++++++
MAINTAINERS | 1 +
3 files changed, 60 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
create mode 100644 Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
diff --git a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
deleted file mode 100644
index 16b734ad3102..000000000000
--- a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Xilinx Zynq QSPI controller Device Tree Bindings
--------------------------------------------------------------------
-
-Required properties:
-- compatible : Should be "xlnx,zynq-qspi-1.0".
-- reg : Physical base address and size of QSPI registers map.
-- interrupts : Property with a value describing the interrupt
- number.
-- clock-names : List of input clock names - "ref_clk", "pclk"
- (See clock bindings for details).
-- clocks : Clock phandles (see clock bindings for details).
-
-Optional properties:
-- num-cs : Number of chip selects used.
-
-Example:
- qspi: spi@...0d000 {
- compatible = "xlnx,zynq-qspi-1.0";
- reg = <0xe000d000 0x1000>;
- interrupt-parent = <&intc>;
- interrupts = <0 19 4>;
- clock-names = "ref_clk", "pclk";
- clocks = <&clkc 10>, <&clkc 43>;
- num-cs = <1>;
- };
diff --git a/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml b/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
new file mode 100644
index 000000000000..03269a7433b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Zynq QSPI controller
+
+description:
+ The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
+ memory devices.
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+maintainers:
+ - Michal Simek <michal.simek@...inx.com>
+
+# Everything else is described in the common file
+properties:
+ compatible:
+ const: xlnx,zynq-qspi-1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: reference clock
+ - description: peripheral clock
+
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: true
+
+examples:
+ - |
+ spi@...0d000 {
+ compatible = "xlnx,zynq-qspi-1.0";
+ reg = <0xe000d000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 19 4>;
+ clock-names = "ref_clk", "pclk";
+ clocks = <&clkc 10>, <&clkc 43>;
+ num-cs = <1>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 546aa66428c9..e494b061dcd1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2766,6 +2766,7 @@ W: http://wiki.xilinx.com
T: git https://github.com/Xilinx/linux-xlnx.git
F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
+F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
F: arch/arm/mach-zynq/
F: drivers/block/xsysace.c
F: drivers/clocksource/timer-cadence-ttc.c
--
2.30.0
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