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Message-ID: <c5e68822-2407-e72e-d31e-620ffc08294c@arm.com>
Date: Wed, 3 Feb 2021 15:51:09 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Mathieu Poirier <mathieu.poirier@...aro.org>,
Anshuman Khandual <anshuman.khandual@....com>
Cc: linux-arm-kernel@...ts.infradead.org, coresight@...ts.linaro.org,
mike.leach@...aro.org, lcherian@...vell.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 04/14] coresight: ete: Add support for ETE sysreg
access
On 2/2/21 5:52 PM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:28PM +0530, Anshuman Khandual wrote:
>> From: Suzuki K Poulose <suzuki.poulose@....com>
>>
>> Add support for handling the system registers for Embedded Trace
>> Extensions (ETE). ETE shares most of the registers with ETMv4 except
>> for some and also adds some new registers. Re-arrange the ETMv4x list
>> to share the common definitions and add the ETE sysreg support.
>>
>> Cc: Mike Leach <mike.leach@...aro.org>
>> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
>> ---
>> drivers/hwtracing/coresight/coresight-etm4x-core.c | 32 +++++++++++++
>> drivers/hwtracing/coresight/coresight-etm4x.h | 52 ++++++++++++++++++----
>> 2 files changed, 75 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> index 9edf8be..9e92d2a 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> @@ -114,6 +114,38 @@ void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
>> }
>> }
>>
>> +u64 ete_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
>> +{
>> + u64 res = 0;
>> +
>> + switch (offset) {
>> + ETE_READ_CASES(res)
>> + default :
>> + WARN_ONCE(1, "ete: trying to read unsupported register @%x\n",
>> + offset);
>
> Alignment
>
>> + }
>> +
>> + if (!_relaxed)
>> + __iormb(res); /* Imitate the !relaxed I/O helpers */
>> +
>> + return res;
>> +}
>> +
>> +void ete_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
>> +{
>> + if (!_relaxed)
>> + __iowmb(); /* Imitate the !relaxed I/O helpers */
>> + if (!_64bit)
>> + val &= GENMASK(31, 0);
>> +
>> + switch (offset) {
>> + ETE_WRITE_CASES(val)
>> + default :
>> + WARN_ONCE(1, "ete: trying to write to unsupported register @%x\n",
>> + offset);
>
> Alignment
>
>> + }
>> +}
>
> The etm4x_sysreg_xyz() equivalent of these use a pr_warn_ratelimited() rather
> than a WARN_ONE().
>
> With that:
>
> Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
Converted to pr_warn_ratelimited() to both instances and fixed Alignment
Cheers
Suzuki
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