lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210203161137.GS1463@shell.armlinux.org.uk>
Date:   Wed, 3 Feb 2021 16:11:38 +0000
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Kostya Porotchkin <kostap@...vell.com>
Cc:     Baruch Siach <baruch@...s.co.il>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "jaz@...ihalf.com" <jaz@...ihalf.com>,
        "gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
        Nadav Haklai <nadavh@...vell.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        Stefan Chulski <stefanc@...vell.com>,
        "mw@...ihalf.com" <mw@...ihalf.com>,
        Ben Peled <bpeled@...vell.com>,
        "sebastian.hesselbarth@...il.com" <sebastian.hesselbarth@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings

On Wed, Feb 03, 2021 at 02:50:45PM +0000, Kostya Porotchkin wrote:
> [KP] So for older systems this "slow mode" parameter could be set on the board level.
> When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even if they support HS400 on AP side.
> MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" flag set, so it should remain in low speed anyway.

Your reasoning does not make sense.

The ap80x.dtsi file does not specify "marvell,xenon-phy-slow-mode".
It is not specified at this level. It is already specified at board
level.

Given that Macchiatobin will still use slow mode, why remove the
marvell,xenon-phy-slow-mode property from this file?

Also, if you're upgrading ap80x.dtsi to use a bus-width of 8, why
keep the bus-width specifier of 8 in the board files?

This patch just doesn't make sense, and your responses to our points
seem to add to the confusion.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ