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Message-ID: <YBtZs4Z2ROeHyf3m@google.com>
Date: Wed, 3 Feb 2021 18:19:31 -0800
From: Sean Christopherson <seanjc@...gle.com>
To: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>
Cc: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"jmattson@...gle.com" <jmattson@...gle.com>,
"joro@...tes.org" <joro@...tes.org>,
"vkuznets@...hat.com" <vkuznets@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"thomas.lendacky@....com" <thomas.lendacky@....com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"brijesh.singh@....com" <brijesh.singh@....com>,
"wanpengli@...cent.com" <wanpengli@...cent.com>
Subject: Re: [PATCH 07/12] KVM: x86: SEV: Treat C-bit as legal GPA bit
regardless of vCPU mode
On Thu, Feb 04, 2021, Edgecombe, Rick P wrote:
> On Wed, 2021-02-03 at 16:01 -0800, Sean Christopherson wrote:
> >
> > - unsigned long cr3_lm_rsvd_bits;
> > + u64 reserved_gpa_bits;
>
> LAM defines bits above the GFN in CR3:
> https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
>
> KVM doesn't support this today of course, but it might be confusing to
> try to combine the two concepts.
Ah, took me a few minutes, but I see what you're saying. LAM will introduce
bits that are repurposed for CR3, but not generic GPAs. And, the behavior is
based on CPU support, so it'd make sense to have a mask cached in vcpu->arch
as opposed to constantly generating it on the fly.
Definitely agree that having a separate cr3_lm_rsvd_bits or whatever is the
right way to go when LAM comes along. Not sure it's worth keeping a duplicate
field in the meantime, though it would avoid a small amount of thrash.
Paolo, any thoughts?
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