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Message-ID: <20210205160127.ylcdd6bbve6q2bbk@black.fi.intel.com>
Date: Fri, 5 Feb 2021 19:01:27 +0300
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>, x86@...nel.org,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Alexander Potapenko <glider@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
"H . J . Lu" <hjl.tools@...il.com>,
Andi Kleen <ak@...ux.intel.com>, linux-mm@...ck.org,
linux-kernel@...r.kernel.org
Subject: Re: [RFC 0/9] Linear Address Masking enabling
On Fri, Feb 05, 2021 at 04:49:05PM +0100, Peter Zijlstra wrote:
> On Fri, Feb 05, 2021 at 06:16:20PM +0300, Kirill A. Shutemov wrote:
> > The feature competes for bits with 5-level paging: LAM_U48 makes it
> > impossible to map anything about 47-bits. The patchset made these
> > capability mutually exclusive: whatever used first wins. LAM_U57 can be
> > combined with mappings above 47-bits.
>
> And I suppose we still can't switch between 4 and 5 level at runtime,
> using a CR3 bit?
No. And I can't imagine how would it work with 5-level on kernel side.
--
Kirill A. Shutemov
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