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Date:   Fri, 5 Feb 2021 09:15:43 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] KVM: x86: Restore all 64 bits of DR6 and DR7 during
 RSM on x86-64

On 05/02/21 02:24, Sean Christopherson wrote:
> Restore the full 64-bit values of DR6 and DR7 when emulating RSM on
> x86-64, as defined by both Intel's SDM and AMD's APM.
> 
> Note, bits 63:32 of DR6 and DR7 are reserved, so this is a glorified nop
> unless the SMM handler is poking into SMRAM, which it most definitely
> shouldn't be doing since both Intel and AMD list the DR6 and DR7 fields
> as read-only.
> 
> Fixes: 660a5d517aaa ("KVM: x86: save/load state on SMM switch")
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
>   arch/x86/kvm/emulate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
> index 2e6e6c39922f..72a1bd04dfe1 100644
> --- a/arch/x86/kvm/emulate.c
> +++ b/arch/x86/kvm/emulate.c
> @@ -2564,12 +2564,12 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
>   	ctxt->_eip   = GET_SMSTATE(u64, smstate, 0x7f78);
>   	ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED;
>   
> -	val = GET_SMSTATE(u32, smstate, 0x7f68);
> +	val = GET_SMSTATE(u64, smstate, 0x7f68);
>   
>   	if (ctxt->ops->set_dr(ctxt, 6, val))
>   		return X86EMUL_UNHANDLEABLE;
>   
> -	val = GET_SMSTATE(u32, smstate, 0x7f60);
> +	val = GET_SMSTATE(u64, smstate, 0x7f60);
>   
>   	if (ctxt->ops->set_dr(ctxt, 7, val))
>   		return X86EMUL_UNHANDLEABLE;
> 

Queued, thanks.

Paolo

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