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Message-ID: <CAPv3WKcuOXdN4zRSaGm1RnaBaXLsCtuT7CRMBAPDFvnBL76oEw@mail.gmail.com>
Date:   Fri, 5 Feb 2021 10:45:32 +0100
From:   Marcin Wojtas <mw@...ihalf.com>
To:     Kostya Porotchkin <kostap@...vell.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Russell King - ARM Linux <linux@...linux.org.uk>,
        Rob Herring <robh+dt@...nel.org>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Grégory Clement <gregory.clement@...tlin.com>,
        Andrew Lunn <andrew@...n.ch>,
        Grzegorz Jaszczyk <jaz@...ihalf.com>, nadavh@...vell.com,
        Stefan Chulski <stefanc@...vell.com>,
        Ben Peled (בן פלד) <bpeled@...vell.com>
Subject: Re: [PATCH 09/11] dts: a3700: enable dma coherence for PCIE interface

Hi Kosta,

śr., 3 lut 2021 o 14:32 <kostap@...vell.com> napisał(a):
>
> From: Stefan Chulski <stefanc@...vell.com>
>
> Enavble PCIe dma coherence for A3700 platform
>

While at it, can we also add:

--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -71,6 +71,7 @@ soc {
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <2>;
+               dma-coherent;
                ranges;

                internal-regs@...00000 {

so that to enable it for all bus-attached interfaces? This safe and
will boost IO performance.

Thanks,
Marcin

> Signed-off-by: Stefan Chulski <stefanc@...vell.com>
> Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
> ---
>  arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index d5b6c0a1c54a..5c0df06bc707 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -486,6 +486,7 @@
>                         #interrupt-cells = <1>;
>                         msi-parent = <&pcie0>;
>                         msi-controller;
> +                       dma-coherent;
>                         ranges = <0x82000000 0 0xe8000000   0 0xe8000000 0 0x1000000 /* Port 0 MEM */
>                                   0x81000000 0 0xe9000000   0 0xe9000000 0 0x10000>; /* Port 0 IO*/
>                         interrupt-map-mask = <0 0 0 7>;
> --
> 2.17.1
>

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