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Message-ID: <20210205190106.58bf14dd@xps13>
Date:   Fri, 5 Feb 2021 19:01:06 +0100
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     mdalam@...eaurora.org
Cc:     richard@....at, vigneshr@...com, boris.brezillon@...labora.com,
        manivannan.sadhasivam@...aro.org, linux-mtd@...ts.infradead.org,
        linux-kernel@...r.kernel.org, sricharan@...eaurora.org
Subject: Re: [PATCH] mtd: rawnand: qcom: Update register macro name for 0x2c
 offset

Hello,

mdalam@...eaurora.org wrote on Fri, 05 Feb 2021 23:26:33 +0530:

> On 2021-01-31 01:37, Md Sadre Alam wrote:
> > This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> > Since this register was only available in QPIC version 1.4.20 ipq40xx
> > and it was not used. In QPIC version 1.5 on wards this register got
> > removed.In QPIC version 2.0 0x2c offset is updated with register
> > NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
> > with offset 0x2c.
> > 
> > Signed-off-by: Md Sadre Alam <mdalam@...eaurora.org>  
> 
>    Ping! Is any additional info needed for this patch ?

The patch is fine but we are at -rc6, the NAND PR has already been
sent, I don't plan to add more patches for this release. I will apply
new patches at v5.12-rc1.

Thanks,
Miquèl

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