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Message-Id: <20210205234734.3397-3-leoyang.li@nxp.com>
Date:   Fri,  5 Feb 2021 17:47:21 -0600
From:   Li Yang <leoyang.li@....com>
To:     Shawn Guo <shawnguo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        devicetree@...r.kernel.org,
        Oleksij Rempel <linux@...pel-privat.de>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc:     Li Yang <leoyang.li@....com>
Subject: [PATCH 02/15] dt-bindings: i2c: imx: update schema to align with original binding

Layerscape SoCs doesn't use ipg as clock name.  Remove the clock name
requirement in the schema.  Also the original binding doesn't enforce
the order of "tx" and "rx" in dma-names.  Both orders are used
extensively in existing dtses, update the schema to allow both.

Signed-off-by: Li Yang <leoyang.li@....com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
index f23966b0d6c6..57237b0b7d89 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
@@ -54,20 +54,19 @@ properties:
     maxItems: 1
 
   clock-names:
-    const: ipg
+    maxItems: 1
 
   clock-frequency:
     enum: [ 100000, 400000 ]
 
   dmas:
-    items:
-      - description: DMA controller phandle and request line for RX
-      - description: DMA controller phandle and request line for TX
+    minItems: 2
+    maxItems: 2
 
   dma-names:
     items:
-      - const: rx
-      - const: tx
+      - enum: [ "rx", "tx" ]
+      - enum: [ "tx", "rx" ]
 
   sda-gpios:
     maxItems: 1
-- 
2.17.1

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