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Message-ID: <CO6PR18MB3873467A6C0BE7EE06D89AF9B0B09@CO6PR18MB3873.namprd18.prod.outlook.com>
Date: Sun, 7 Feb 2021 07:56:53 +0000
From: Stefan Chulski <stefanc@...vell.com>
To: Jakub Kicinski <kuba@...nel.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"thomas.petazzoni@...tlin.com" <thomas.petazzoni@...tlin.com>,
"davem@...emloft.net" <davem@...emloft.net>,
Nadav Haklai <nadavh@...vell.com>,
Yan Markman <ymarkman@...vell.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux@...linux.org.uk" <linux@...linux.org.uk>,
"mw@...ihalf.com" <mw@...ihalf.com>,
"andrew@...n.ch" <andrew@...n.ch>,
"rmk+kernel@...linux.org.uk" <rmk+kernel@...linux.org.uk>,
"atenart@...nel.org" <atenart@...nel.org>,
Kostya Porotchkin <kostap@...vell.com>
Subject: RE: [EXT] Re: [PATCH v8 net-next 02/15] dts: marvell: add CM3 SRAM
memory to cp11x ethernet device tree
> ----------------------------------------------------------------------
> On Sat, 6 Feb 2021 18:45:48 +0200 stefanc@...vell.com wrote:
> > From: Konstantin Porotchkin <kostap@...vell.com>
> >
> > CM3 SRAM address space would be used for Flow Control configuration.
> >
> > Signed-off-by: Stefan Chulski <stefanc@...vell.com>
> > Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
>
> Isn't there are requirement to CC the DT mailing list and Rob on all device
> tree patches? Maybe someone can clarify I know it's required when adding
> bindings..
I would repost with robh+dt@...nel.org, gregory.clement@...tlin.com and devicetree@...r.kernel.org in CC
Thanks,
Stefan.
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