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Message-ID: <alpine.DEB.2.21.2102081654060.35623@angie.orcam.me.uk>
Date:   Mon, 8 Feb 2021 16:57:33 +0100 (CET)
From:   "Maciej W. Rozycki" <macro@...am.me.uk>
To:     Christoph Hellwig <hch@....de>
cc:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        iommu@...ts.linux-foundation.org
Subject: Re: [PATCH 5/6] driver core: lift dma_default_coherent into common
 code

On Mon, 8 Feb 2021, Christoph Hellwig wrote:

> diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
> index e98cc977a735b2..f8c9663e7faa10 100644
> --- a/arch/mips/mti-malta/malta-setup.c
> +++ b/arch/mips/mti-malta/malta-setup.c
> @@ -143,7 +143,7 @@ static void __init plat_setup_iocoherency(void)
>  			pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
>  	}
>  
> -	if (supported)
> +	if (supported) {
>  		if (dma_force_noncoherent) {
>  			pr_info("Hardware DMA cache coherency disabled\n");
>  			return;

 I think this has to go with 1/6; otherwise compilation breaks between 
then and now AFAICT.

 Do you need to have this verified anyhow?  I only have a non-coherent 5Kc 
Malta though.

  Maciej

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