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Message-Id: <20210208163848.2504291-1-mperttunen@nvidia.com>
Date: Mon, 8 Feb 2021 18:38:40 +0200
From: Mikko Perttunen <mperttunen@...dia.com>
To: thierry.reding@...il.com, jonathanh@...dia.com, joro@...tes.org,
will@...nel.org, robh+dt@...nel.org, frowand.list@...il.com,
robin.murphy@....com
Cc: linux-tegra@...r.kernel.org, dri-devel@...ts.freedesktop.org,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Mikko Perttunen <mperttunen@...dia.com>
Subject: [RFC PATCH 0/8] Host1x context isolation support
Hi all,
this series adds support for Host1x 'context isolation'. Since
when programming engines through Host1x, userspace can program in
any addresses it wants, we need some way to isolate the engines'
memory spaces. Traditionally this has either been done imperfectly
with a single shared IOMMU domain, or by copying and verifying the
programming command stream at submit time (Host1x firewall).
Since Tegra186 there is a privileged (only usable by kernel)
Host1x opcode that allows setting the stream ID sent by the engine
to the SMMU. So, by allocating a number of context banks and stream
IDs for this purpose, and using this opcode at the beginning of
each job, we can implement isolation. Due to the limited number of
context banks only each process gets its own context, and not
each channel.
This feature also allows sharing engines among multiple VMs when
used with Host1x's hardware virtualization support - up to 8 VMs
can be configured with a subset of allowed stream IDs, enforced
at hardware level.
To implement this, this series adds a new host1x context bus, which
will contain the 'struct device's corresponding to each context
bank / stream ID, changes to device tree and SMMU code to allow
registering the devices and using the bus, as well as the Host1x
stream ID programming code and support in TegraDRM.
The series is based on v5 of the "Host1x/TegraDRM UAPI" series,
which still hasn't quite settled. Also, I haven't updated the
device tree bindings (or converted them to YAML) yet, so this
is RFC for now.
Thanks!
Mikko
Mikko Perttunen (8):
of/device: Allow specifying a custom iommu_spec to of_dma_configure
gpu: host1x: Add context bus
gpu: host1x: Add context device management code
gpu: host1x: Program context stream ID on submission
iommu/arm-smmu: Attach to host1x context device bus
arm64: tegra: Add Host1x context stream IDs on Tegra186+
drm/tegra: Support context isolation
drm/tegra: vic: Implement get_streamid_offset
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 9 ++
drivers/gpu/Makefile | 3 +-
drivers/gpu/drm/tegra/drm.h | 1 +
drivers/gpu/drm/tegra/uapi.h | 1 +
drivers/gpu/drm/tegra/uapi/submit.c | 13 ++
drivers/gpu/drm/tegra/uapi/uapi.c | 34 ++++-
drivers/gpu/drm/tegra/vic.c | 38 +++++
drivers/gpu/host1x/Kconfig | 5 +
drivers/gpu/host1x/Makefile | 2 +
drivers/gpu/host1x/context.c | 161 ++++++++++++++++++++++
drivers/gpu/host1x/context.h | 27 ++++
drivers/gpu/host1x/context_bus.c | 31 +++++
drivers/gpu/host1x/dev.c | 12 +-
drivers/gpu/host1x/dev.h | 2 +
drivers/gpu/host1x/hw/channel_hw.c | 52 ++++++-
drivers/gpu/host1x/hw/host1x06_hardware.h | 10 ++
drivers/gpu/host1x/hw/host1x07_hardware.h | 10 ++
drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 ++
drivers/iommu/of_iommu.c | 12 +-
drivers/of/device.c | 9 +-
include/linux/host1x.h | 21 +++
include/linux/host1x_context_bus.h | 15 ++
include/linux/of_device.h | 34 ++++-
include/linux/of_iommu.h | 6 +-
24 files changed, 495 insertions(+), 26 deletions(-)
create mode 100644 drivers/gpu/host1x/context.c
create mode 100644 drivers/gpu/host1x/context.h
create mode 100644 drivers/gpu/host1x/context_bus.c
create mode 100644 include/linux/host1x_context_bus.h
--
2.30.0
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