linux-kernel - Re: [PATCH] clk: qcom: smd: Add missing RPM clocks for msm8992/4

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Message-ID: <03daf7af-309d-8b32-eb7e-1f03e35bdc42@somainline.org>
Date:   Mon, 8 Feb 2021 18:52:34 +0100
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Stephen Boyd <sboyd@...nel.org>, phone-devel@...r.kernel.org
Cc:     ~postmarketos/upstreaming@...ts.sr.ht,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Brown <broonie@...nel.org>,
        AngeloGioacchino Del Regno <kholk11@...il.com>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: smd: Add missing RPM clocks for msm8992/4


On 08.02.2021 18:50, Stephen Boyd wrote:
> Quoting Konrad Dybcio (2021-01-18 08:14:41)
>> This was omitted when first adding the clocks for these SoCs.
>>
> I believe they were omitted because the system crashed if they were
> touched. Is that still the case?

No, rpmcc XO seems to work fine, no crashes around. I just forgot about these the first time around.


>> Fixes: b4297844995 ("clk: qcom: smd: Add support for MSM8992/4 rpm clocks")
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
>> ---
>>  drivers/clk/qcom/clk-smd-rpm.c         | 16 ++++++++++++++++
>>  include/dt-bindings/clock/qcom,rpmcc.h |  2 ++
>>  include/linux/soc/qcom/smd-rpm.h       |  1 +
>>  3 files changed, 19 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
>> index 0e1dfa89489e..91d610042a5d 100644
>> --- a/drivers/clk/qcom/clk-smd-rpm.c
>> +++ b/drivers/clk/qcom/clk-smd-rpm.c
>> @@ -624,6 +624,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>>  };
>>  
>>  /* msm8992 */
>> +DEFINE_CLK_SMD_RPM_BRANCH(msm8992, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0,
>> +                                                               19200000);
> This rate should come from some parent clk specified in the board DTS
> file as a fixed rate clock.

The hardcoded-by-design xo_board is 19.2 MHz too, so that matches.


Konrad