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Message-ID: <1612773167-22490-3-git-send-email-stefanc@marvell.com>
Date: Mon, 8 Feb 2021 10:32:34 +0200
From: <stefanc@...vell.com>
To: <netdev@...r.kernel.org>
CC: <thomas.petazzoni@...tlin.com>, <davem@...emloft.net>,
<nadavh@...vell.com>, <ymarkman@...vell.com>,
<linux-kernel@...r.kernel.org>, <stefanc@...vell.com>,
<kuba@...nel.org>, <linux@...linux.org.uk>, <mw@...ihalf.com>,
<andrew@...n.ch>, <rmk+kernel@...linux.org.uk>,
<atenart@...nel.org>, <devicetree@...r.kernel.org>,
<robh+dt@...nel.org>, <sebastian.hesselbarth@...il.com>,
<gregory.clement@...tlin.com>,
<linux-arm-kernel@...ts.infradead.org>,
Konstantin Porotchkin <kostap@...vell.com>
Subject: [PATCH v10 net-next 02/15] dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree
From: Konstantin Porotchkin <kostap@...vell.com>
CM3 SRAM address space would be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@...vell.com>
Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
---
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16b..6fe0d26 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -59,7 +59,7 @@
CP11X_LABEL(ethernet): ethernet@0 {
compatible = "marvell,armada-7k-pp22";
- reg = <0x0 0x100000>, <0x129000 0xb000>;
+ reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
<&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
<&CP11X_LABEL(clk) 1 18>;
--
1.9.1
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