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Message-ID: <20210208140341.9271-1-Sergey.Semin@baikalelectronics.ru>
Date: Mon, 8 Feb 2021 17:03:21 +0300
From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
To: Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...com>,
Jose Abreu <joabreu@...opsys.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Joao Pinto <Joao.Pinto@...opsys.com>,
Jose Abreu <Jose.Abreu@...opsys.com>
CC: Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Vyacheslav Mitrofanov
<Vyacheslav.Mitrofanov@...kalelectronics.ru>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Russell King <linux@...linux.org.uk>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
<netdev@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH 00/20] net: stmmac: Obvious cleanups and several fixes
This series consists of a preparation patches before adding DW MAC GPIOs
and final Baikal-T1 GMAC support. (The later will be done in the framework
of the Generic DW MAC glue-driver though.) It's mainly about cleaning the
code up here and there by removing unused data and macro names, but also
includes several bugs and design fixes.
The patchset starts from fixing the Realtek PHYs driver. In particular it
has been discovered that disabling RXC in LPI (EEE) causes RTL8211E PHY
partial freeze until the next MDIO read operation from the PHY CSRs. We
suggest to fix that problem by dummy reading from the MMD Data register
each time the PC1R.10 bit is intended to be set.
Then the series evolves in a set of bug fixes discovered in the main
STMMAC driver code. First of all the cleanup-on-error path has been
incorrectly implemented in the DMA descriptor allocation procedure due to
which in case Tx DMA resources allocation failures the Rx DMA descriptors
will be left unfreed. Secondly it has been discovered that the MTL IRQs
handling procedure didn't do that quite well, so any MTL RX overflow
errors will be handled for queues with higher order too, which most likely
isn't what the code author originally intended. Thirdly the DW MAC reset
control de-assetion should be performed after the MDIO-bus
de-registration, because the later may need to access PHY registers, which
is supposed to be done via the MAC SMA interface. Fourthly we've found out
that DW MAC v4.x code was using a generic dwmac4_disable_dma_irq() method
to disable DMA IRQs instead of having the dedicated
dwmac410_disable_dma_irq() method utilized. That didn't cause any problem
because the modified bits matches in both IP-core revisions, but for
consistency we suggest to fix that. Fifthly for the same reason of the
naming consistency the GMAC_INT_STATUS_PMT macro constant should be used
instead of GMAC_INT_DISABLE_PMT to check the PMT IRQs status. Finally it's
strange that the problem hasn't been discovered before, but it is most
likely wrong to initialized Tx/Rx DMA descriptors, and then clean them up.
That specifically concerns the Tx DMA descriptors initialization procedure
in the Chain-mode. Please the patch for details.
The patchset then proceed with multiple optimizations and cleanups
performed here and there in the code: fix typo in the XGMAC_L3_ADDR3 macro
name, discard unused mii_irq array from the private data, discard nothing
changing Rx copybreak ethtool setting, discard redundant index variable
usage in the dirty_rx initialization method, discard dwmac1000_dma_ops
declaration from dwmac100.h, move DMA Tx/Rx init methods to the DW MAC lib
since they match for DW MAC and DW GMA IP-cores, discard pointless
STMMAC_RESETING flag, discard conditional service task execution since
it's called from CMWQ anyway (it's also errors prone, since any event
happening during the service task execution will be lost), add 'cause' arg
to the service task executioner to generalize the deferred events handling
interface. Finally in the framework of the code cleanup procedure we
suggest to extend the stmmac_hw_teardown() functionality with all the
necessary hardware cleanups, which for some reason were directly performed
in the network device release callback. That concerns PTP clocks
disabling, DMA channels and MAC Tx/Rx de-activation.
Note the STMMAC driver is having much more weak design patterns and style
problems (like calculating the total number of queues every time it's
needed, or antagonist/cleanup methods absence while having the reversal
code added in the remove/cleanup paths), than what is fixed in the
framework of this series, which make the code hard to read, comprehend,
maintain and extend with new features. Most likely the situation turned to
be like that due to a long history of the driver evolving to support many
different IP-core versions and vendor-specific MAC extensions. Anyway it
would have taken not a single patches series to fix all of the problems.
Since it hasn't been my primary target, here in this series I've
introduced the cleanups and fixes, which prepared the corresponding parts
of the code for easier alterations in the framework of adding the DW MAC
GPIOs and Baikal-T1 GMAC support into the driver.
The series is supposed to be applied on top of the last revision of the
next patchset:
Link: https://lore.kernel.org/netdev/20201214091616.13545-1-Sergey.Semin@baikalelectronics.ru/
otherwise a few patches won't get merged in cleanly.
Fixes: 7bac4e1ec3ca ("net: stmmac: stmmac interrupt treatment prepared for multiple queues")
Fixes: 021bd5e36970 ("net: stmmac: Let TX and RX interrupts be independently enabled/disabled")
Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
Cc: Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>
Cc: Vyacheslav Mitrofanov <Vyacheslav.Mitrofanov@...kalelectronics.ru>
Cc: Maxime Coquelin <mcoquelin.stm32@...il.com>
Cc: Russell King <linux@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Heiner Kallweit <hkallweit1@...il.com>
Cc: netdev@...r.kernel.org
Cc: linux-stm32@...md-mailman.stormreply.com
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Serge Semin (20):
net: phy: realtek: Fix events detection failure in LPI mode
net: stmmac: Free Rx descs on Tx allocation failure
net: stmmac: Fix false MTL RX overflow handling for higher queues
net: stmmac: Assert reset control after MDIO de-registration
net: stmmac: Use dwmac410_disable_dma_irq for DW MAC v4.10 DMA
net: stmmac: Use LPI IRQ status-related macro in DW MAC1000 isr
net: stmmac: Clear descriptors before initializing them
net: stmmac: Fix typo in the XGMAC_L3_ADDR3 macro name
net: stmmac: Discard mii_irq array from private data
net: stmmac: Discard Rx copybreak ethtool setting
net: stmmac: Discard index usage in the dirty_rx init
net: stmmac: Discard dwmac1000_dma_ops declaration from dwmac100.h
net: stmmac: Move DMA Tx/Rx init methods to DW MAC lib
net: stmmac: Add DW GMAC disable LPI IRQ mask macro
net: stmmac: Discard STMMAC_RESETING flag
net: stmmac: Discard conditional service task execution
net: stmmac: Add 'cause' arg to the service task executioner
net: stmmac: Move PTP clock enabling to PTP-init method
net: stmmac: Move DMA stop procedure to HW-setup antagonist
net: stmmac: Move MAC Tx/Rx disabling to HW-setup antagonist
.../net/ethernet/stmicro/stmmac/dwmac1000.h | 2 +-
.../ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +-
.../ethernet/stmicro/stmmac/dwmac1000_dma.c | 20 +----
.../ethernet/stmicro/stmmac/dwmac100_dma.c | 20 +----
.../net/ethernet/stmicro/stmmac/dwmac4_dma.c | 2 +-
.../net/ethernet/stmicro/stmmac/dwmac_dma.h | 4 +
.../net/ethernet/stmicro/stmmac/dwmac_lib.c | 14 ++++
.../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 --
.../ethernet/stmicro/stmmac/stmmac_ethtool.c | 39 ---------
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 81 +++++++++----------
drivers/net/phy/realtek.c | 37 +++++++++
12 files changed, 102 insertions(+), 126 deletions(-)
--
2.29.2
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