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Message-Id: <20210208145024.3320420-2-hch@lst.de>
Date: Mon, 8 Feb 2021 15:50:19 +0100
From: Christoph Hellwig <hch@....de>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
iommu@...ts.linux-foundation.org
Subject: [PATCH 1/6] MIPS/malta: simplify plat_setup_iocoherency
Merge plat_enable_iocoherency into plat_setup_iocoherency to simplify
the code a bit.
Signed-off-by: Christoph Hellwig <hch@....de>
---
arch/mips/mti-malta/malta-setup.c | 17 ++++++-----------
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
index e1fb8b5349447e..f3fec5a5a07c76 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -90,7 +90,7 @@ static void __init fd_activate(void)
}
#endif
-static int __init plat_enable_iocoherency(void)
+static void __init plat_setup_iocoherency(void)
{
int supported = 0;
u32 cfg;
@@ -118,19 +118,13 @@ static int __init plat_enable_iocoherency(void)
/* Nothing special needs to be done to enable coherency */
pr_info("CMP IOCU detected\n");
cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
- if (!(cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)) {
+ if (cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)
+ supported = 1;
+ else
pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
- return 0;
- }
- supported = 1;
}
- hw_coherentio = supported;
- return supported;
-}
-static void __init plat_setup_iocoherency(void)
-{
- if (plat_enable_iocoherency()) {
+ if (supported)
if (coherentio == IO_COHERENCE_DISABLED)
pr_info("Hardware DMA cache coherency disabled\n");
else
@@ -141,6 +135,7 @@ static void __init plat_setup_iocoherency(void)
else
pr_info("Software DMA cache coherency enabled\n");
}
+ hw_coherentio = supported;
}
static void __init pci_clock_check(void)
--
2.29.2
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