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Message-ID: <240a0245f75d8368a4d90a5e6740dc7d@kernel.org>
Date: Mon, 08 Feb 2021 15:02:22 +0000
From: Marc Zyngier <maz@...nel.org>
To: Will Deacon <will@...nel.org>
Cc: Prasad Sodagudi <psodagud@...eaurora.org>,
Srinivas Ramana <sramana@...eaurora.org>,
Catalin Marinas <catalin.marinas@....com>,
Hector Martin <marcan@...can.st>, linux-kernel@...r.kernel.org,
Ard Biesheuvel <ardb@...nel.org>,
Ajay Patil <pajay@....qualcomm.com>, kernel-team@...roid.com,
kvmarm@...ts.cs.columbia.edu, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v7 00/23] arm64: Early CPU feature override, and
applications to VHE, BTI and PAuth
Hi Will,
On 2021-02-08 14:32, Will Deacon wrote:
> Hi Marc,
>
> On Mon, Feb 08, 2021 at 09:57:09AM +0000, Marc Zyngier wrote:
>> It recently came to light that there is a need to be able to override
>> some CPU features very early on, before the kernel is fully up and
>> running. The reasons for this range from specific feature support
>> (such as using Protected KVM on VHE HW, which is the main motivation
>> for this work) to errata workaround (a feature is broken on a CPU and
>> needs to be turned off, or rather not enabled).
>>
>> This series tries to offer a limited framework for this kind of
>> problems, by allowing a set of options to be passed on the
>> command-line and altering the feature set that the cpufeature
>> subsystem exposes to the rest of the kernel. Note that this doesn't
>> change anything for code that directly uses the CPU ID registers.
>
> I applied this locally, but I'm seeing consistent boot failure under
> QEMU when
> KASAN is enabled. I tried sprinkling some __no_sanitize_address
> annotations
> around (see below) but it didn't help. The culprit appears to be
> early_fdt_map(), but looking a bit more closely, I'm really nervous
> about the
> way we call into C functions from __primary_switched. Remember -- this
> code
> runs _twice_ when KASLR is active: before and after the randomization.
> This
> also means that any memory writes the first time around can be lost due
> to
> the D-cache invalidation when (re-)creating the kernel page-tables.
Well, we already call into C functions with KASLR, and nothing explodes
with that, so I must be doing something else wrong.
I do have cache maintenance for the writes to the shadow registers, so
that
part should be fine. But I think I'm missing some cache maintenance
around
the FDT base itself, and I wonder what happens when we go around the
loop.
I'll chase this down now.
Thanks for the heads up.
M.
--
Jazz is not dead. It just smells funny...
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